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authorSamuel Thibault <samuel.thibault@ens-lyon.org>2011-05-08 22:45:06 +0200
committerSamuel Thibault <samuel.thibault@ens-lyon.org>2011-05-08 22:45:06 +0200
commit878c5456c5a2f9bff741a7b7bcdccd5c1694db22 (patch)
treebcf3d101215fa70b953aa7e9d0de805c5f8865b4 /libdde_linux26/contrib/include/linux/spi/eeprom.h
parent9062642230b7bfb48e7b30f98cba8528172b2d36 (diff)
parentc8f311a7a32d4b0cb0c21672f63bca8efdf5d83a (diff)
Merge branch 'dde' into HEAD
Diffstat (limited to 'libdde_linux26/contrib/include/linux/spi/eeprom.h')
-rw-r--r--libdde_linux26/contrib/include/linux/spi/eeprom.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/libdde_linux26/contrib/include/linux/spi/eeprom.h b/libdde_linux26/contrib/include/linux/spi/eeprom.h
new file mode 100644
index 00000000..1085212c
--- /dev/null
+++ b/libdde_linux26/contrib/include/linux/spi/eeprom.h
@@ -0,0 +1,22 @@
+#ifndef __LINUX_SPI_EEPROM_H
+#define __LINUX_SPI_EEPROM_H
+
+/*
+ * Put one of these structures in platform_data for SPI EEPROMS handled
+ * by the "at25" driver. On SPI, most EEPROMS understand the same core
+ * command set. If you need to support EEPROMs that don't yet fit, add
+ * flags to support those protocol options. These values all come from
+ * the chip datasheets.
+ */
+struct spi_eeprom {
+ u32 byte_len;
+ char name[10];
+ u16 page_size; /* for writes */
+ u16 flags;
+#define EE_ADDR1 0x0001 /* 8 bit addrs */
+#define EE_ADDR2 0x0002 /* 16 bit addrs */
+#define EE_ADDR3 0x0004 /* 24 bit addrs */
+#define EE_READONLY 0x0008 /* disallow writes */
+};
+
+#endif /* __LINUX_SPI_EEPROM_H */