diff options
| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-07-27 22:07:53 +0000 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-07-27 22:07:53 +0000 |
| commit | 4fbe7358c7747a9165f776eb19addbb9baf7def2 (patch) | |
| tree | bc7076b4f6d10c2cc2942539bb666e50f0b66954 /libdde_linux26/contrib/include/linux/cache.h | |
| parent | 21adb5284111190057db245cfc2b54091920c373 (diff) | |
rename libdde_linux26 into libdde-linux26 to make dpkg-source happy
Diffstat (limited to 'libdde_linux26/contrib/include/linux/cache.h')
| -rw-r--r-- | libdde_linux26/contrib/include/linux/cache.h | 67 |
1 files changed, 0 insertions, 67 deletions
diff --git a/libdde_linux26/contrib/include/linux/cache.h b/libdde_linux26/contrib/include/linux/cache.h deleted file mode 100644 index 97e24881..00000000 --- a/libdde_linux26/contrib/include/linux/cache.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef __LINUX_CACHE_H -#define __LINUX_CACHE_H - -#include <linux/kernel.h> -#include <asm/cache.h> - -#ifndef L1_CACHE_ALIGN -#define L1_CACHE_ALIGN(x) ALIGN(x, L1_CACHE_BYTES) -#endif - -#ifndef SMP_CACHE_BYTES -#define SMP_CACHE_BYTES L1_CACHE_BYTES -#endif - -#ifndef __read_mostly -#define __read_mostly -#endif - -#ifndef ____cacheline_aligned -#define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) -#endif - -#ifndef ____cacheline_aligned_in_smp -#ifdef CONFIG_SMP -#define ____cacheline_aligned_in_smp ____cacheline_aligned -#else -#define ____cacheline_aligned_in_smp -#endif /* CONFIG_SMP */ -#endif - -#ifndef __cacheline_aligned -#define __cacheline_aligned \ - __attribute__((__aligned__(SMP_CACHE_BYTES), \ - __section__(".data.cacheline_aligned"))) -#endif /* __cacheline_aligned */ - -#ifndef __cacheline_aligned_in_smp -#ifdef CONFIG_SMP -#define __cacheline_aligned_in_smp __cacheline_aligned -#else -#define __cacheline_aligned_in_smp -#endif /* CONFIG_SMP */ -#endif - -/* - * The maximum alignment needed for some critical structures - * These could be inter-node cacheline sizes/L3 cacheline - * size etc. Define this in asm/cache.h for your arch - */ -#ifndef INTERNODE_CACHE_SHIFT -#define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT -#endif - -#if !defined(____cacheline_internodealigned_in_smp) -#if defined(CONFIG_SMP) -#define ____cacheline_internodealigned_in_smp \ - __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) -#else -#define ____cacheline_internodealigned_in_smp -#endif -#endif - -#ifndef CONFIG_ARCH_HAS_CACHE_LINE_SIZE -#define cache_line_size() L1_CACHE_BYTES -#endif - -#endif /* __LINUX_CACHE_H */ |