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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-07-27 22:15:01 +0000 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-07-27 22:15:01 +0000 |
| commit | 7996a3d79d55b7f879dfd62e202bbfe2963718d3 (patch) | |
| tree | 8d9f6759fec4099b9be503c11c7ed174f7204980 /libdde-linux26/contrib/arch/x86/include/asm/cache.h | |
| parent | 4fbe7358c7747a9165f776eb19addbb9baf7def2 (diff) | |
really properly move files
Diffstat (limited to 'libdde-linux26/contrib/arch/x86/include/asm/cache.h')
| -rw-r--r-- | libdde-linux26/contrib/arch/x86/include/asm/cache.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/libdde-linux26/contrib/arch/x86/include/asm/cache.h b/libdde-linux26/contrib/arch/x86/include/asm/cache.h new file mode 100644 index 00000000..5d367caa --- /dev/null +++ b/libdde-linux26/contrib/arch/x86/include/asm/cache.h @@ -0,0 +1,20 @@ +#ifndef _ASM_X86_CACHE_H +#define _ASM_X86_CACHE_H + +/* L1 cache line size */ +#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) + +#ifdef CONFIG_X86_VSMP +/* vSMP Internode cacheline shift */ +#define INTERNODE_CACHE_SHIFT (12) +#ifdef CONFIG_SMP +#define __cacheline_aligned_in_smp \ + __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ + __attribute__((__section__(".data.page_aligned"))) +#endif +#endif + +#endif /* _ASM_X86_CACHE_H */ |