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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2011-04-23 15:24:35 +0200 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2011-04-23 15:24:35 +0200 |
| commit | 4870d06d1eb03111b36934652481dfdb28d2667d (patch) | |
| tree | f3f419e85d2e08a303d2540967ab3b9c70dba89e /i386 | |
| parent | 8b649ed7b015490c31f6a61da88a9a10cc1eab5c (diff) | |
Enable all caches
* i386/i386at/model_dep.c (i386at_init): Set CR0_CD and CR0_NW in CR0
register.
Diffstat (limited to 'i386')
| -rw-r--r-- | i386/i386at/model_dep.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/i386/i386at/model_dep.c b/i386/i386at/model_dep.c index f9ab691..04b8228 100644 --- a/i386/i386at/model_dep.c +++ b/i386/i386at/model_dep.c @@ -416,6 +416,7 @@ i386at_init(void) #ifndef MACH_HYP /* already set by Hypervisor */ set_cr0(get_cr0() | CR0_PG | CR0_WP); + set_cr0(get_cr0() & ~(CR0_CD | CR0_NW)); if (CPU_HAS_FEATURE(CPU_FEATURE_PGE)) set_cr4(get_cr4() | CR4_PGE); #endif /* MACH_HYP */ |