From 4870d06d1eb03111b36934652481dfdb28d2667d Mon Sep 17 00:00:00 2001
From: Samuel Thibault <samuel.thibault@ens-lyon.org>
Date: Sat, 23 Apr 2011 15:24:35 +0200
Subject: Enable all caches

* i386/i386at/model_dep.c (i386at_init): Set CR0_CD and CR0_NW in CR0
register.
---
 i386/i386at/model_dep.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'i386')

diff --git a/i386/i386at/model_dep.c b/i386/i386at/model_dep.c
index f9ab691..04b8228 100644
--- a/i386/i386at/model_dep.c
+++ b/i386/i386at/model_dep.c
@@ -416,6 +416,7 @@ i386at_init(void)
 #ifndef	MACH_HYP
 	/* already set by Hypervisor */
 	set_cr0(get_cr0() | CR0_PG | CR0_WP);
+	set_cr0(get_cr0() & ~(CR0_CD | CR0_NW));
 	if (CPU_HAS_FEATURE(CPU_FEATURE_PGE))
 		set_cr4(get_cr4() | CR4_PGE);
 #endif	/* MACH_HYP */
-- 
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