../linux/src/drivers/pci/pci.c

Bug Summary

File:	obj-scan-build/../linux/src/drivers/pci/pci.c
Location:	line 955, column 12
Description:	Null pointer argument in call to string length function

Annotated Source Code

* drivers/pci/pci.c

* PCI services that are built on top of the BIOS32 service.

* David Mosberger-Tang

* Apr 12, 1998 : Fixed handling of alien header types. [mj]

#include <linux/config.h>

#include <linux/ptrace.h>

#include <linux/types.h>

#include <linux/kernel.h>

#include <linux/bios32.h>

#include <linux/pci.h>

#include <linux/string.h>

#include <asm/page.h>

struct pci_bus pci_root;

struct pci_dev *pci_devices = 0;

* The bridge_id field is an offset of an item into the array

* BRIDGE_MAPPING_TYPE. 0xff indicates that the device is not a PCI

* bridge, or that we don't know for the moment how to configure it.

* I'm trying to do my best so that the kernel stays small. Different

* chipset can have same optimization structure. i486 and pentium

* chipsets from the same manufacturer usually have the same

* structure.

#define DEVICE(vid,did,name){PCI_VENDOR_ID_vid, PCI_DEVICE_ID_did, (name), 0xff} \

{PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##did, (name), 0xff}

#define BRIDGE(vid,did,name,bridge){PCI_VENDOR_ID_vid, PCI_DEVICE_ID_did, (name), (bridge)} \

{PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##did, (name), (bridge)}

* Sorted in ascending order by vendor and device.

* Use binary search for lookup. If you add a device make sure

* it is sequential by both vendor and device id.

struct pci_dev_info dev_info[] = {

DEVICE( COMPAQ, COMPAQ_1280, "QVision 1280/p"){0x0e11, 0x3033, ("QVision 1280/p"), 0xff},

DEVICE( COMPAQ, COMPAQ_SMART2P, "Smart-2/P RAID Controller"){0x0e11, 0xae10, ("Smart-2/P RAID Controller"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETEL100,"Netelligent 10/100"){0x0e11, 0xae32, ("Netelligent 10/100"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETEL10, "Netelligent 10"){0x0e11, 0xae34, ("Netelligent 10"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETFLEX3I,"NetFlex 3"){0x0e11, 0xae35, ("NetFlex 3"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETEL100D,"Netelligent 10/100 Dual"){0x0e11, 0xae40, ("Netelligent 10/100 Dual"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETEL100PI,"Netelligent 10/100 ProLiant"){0x0e11, 0xae43, ("Netelligent 10/100 ProLiant"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETEL100I,"Netelligent 10/100 Integrated"){0x0e11, 0xb011, ("Netelligent 10/100 Integrated"), 0xff},

DEVICE( COMPAQ, COMPAQ_THUNDER, "ThunderLAN"){0x0e11, 0xf130, ("ThunderLAN"), 0xff},

DEVICE( COMPAQ, COMPAQ_NETFLEX3B,"NetFlex 3 BNC"){0x0e11, 0xf150, ("NetFlex 3 BNC"), 0xff},

DEVICE( NCR, NCR_53C810, "53c810"){0x1000, 0x0001, ("53c810"), 0xff},

DEVICE( NCR, NCR_53C820, "53c820"){0x1000, 0x0002, ("53c820"), 0xff},

DEVICE( NCR, NCR_53C825, "53c825"){0x1000, 0x0003, ("53c825"), 0xff},

DEVICE( NCR, NCR_53C815, "53c815"){0x1000, 0x0004, ("53c815"), 0xff},

DEVICE( NCR, NCR_53C860, "53c860"){0x1000, 0x0006, ("53c860"), 0xff},

DEVICE( NCR, NCR_53C896, "53c896"){0x1000, 0x000b, ("53c896"), 0xff},

DEVICE( NCR, NCR_53C895, "53c895"){0x1000, 0x000c, ("53c895"), 0xff},

DEVICE( NCR, NCR_53C885, "53c885"){0x1000, 0x000d, ("53c885"), 0xff},

DEVICE( NCR, NCR_53C875, "53c875"){0x1000, 0x000f, ("53c875"), 0xff},

DEVICE( NCR, NCR_53C875J, "53c875J"){0x1000, 0x008f, ("53c875J"), 0xff},

DEVICE( ATI, ATI_68800, "68800AX"){0x1002, 0x4158, ("68800AX"), 0xff},

DEVICE( ATI, ATI_215CT222, "215CT222"){0x1002, 0x4354, ("215CT222"), 0xff},

DEVICE( ATI, ATI_210888CX, "210888CX"){0x1002, 0x4358, ("210888CX"), 0xff},

DEVICE( ATI, ATI_215GB, "Mach64 GB"){0x1002, 0x4742, ("Mach64 GB"), 0xff},

DEVICE( ATI, ATI_215GD, "Mach64 GD (Rage Pro)"){0x1002, 0x4744, ("Mach64 GD (Rage Pro)"), 0xff},

DEVICE( ATI, ATI_215GI, "Mach64 GI (Rage Pro)"){0x1002, 0x4749, ("Mach64 GI (Rage Pro)"), 0xff},

DEVICE( ATI, ATI_215GP, "Mach64 GP (Rage Pro)"){0x1002, 0x4750, ("Mach64 GP (Rage Pro)"), 0xff},

DEVICE( ATI, ATI_215GQ, "Mach64 GQ (Rage Pro)"){0x1002, 0x4751, ("Mach64 GQ (Rage Pro)"), 0xff},

DEVICE( ATI, ATI_215GT, "Mach64 GT (Rage II)"){0x1002, 0x4754, ("Mach64 GT (Rage II)"), 0xff},

DEVICE( ATI, ATI_215GTB, "Mach64 GT (Rage II)"){0x1002, 0x4755, ("Mach64 GT (Rage II)"), 0xff},

DEVICE( ATI, ATI_210888GX, "210888GX"){0x1002, 0x4758, ("210888GX"), 0xff},

DEVICE( ATI, ATI_215LG, "Mach64 LG (3D Rage LT)"){0x1002, 0x4c47, ("Mach64 LG (3D Rage LT)"), 0xff},

DEVICE( ATI, ATI_264LT, "Mach64 LT"){0x1002, 0x4c54, ("Mach64 LT"), 0xff},

DEVICE( ATI, ATI_264VT, "Mach64 VT"){0x1002, 0x5654, ("Mach64 VT"), 0xff},

DEVICE( VLSI, VLSI_82C592, "82C592-FC1"){0x1004, 0x0005, ("82C592-FC1"), 0xff},

DEVICE( VLSI, VLSI_82C593, "82C593-FC1"){0x1004, 0x0006, ("82C593-FC1"), 0xff},

DEVICE( VLSI, VLSI_82C594, "82C594-AFC2"){0x1004, 0x0007, ("82C594-AFC2"), 0xff},

DEVICE( VLSI, VLSI_82C597, "82C597-AFC2"){0x1004, 0x0009, ("82C597-AFC2"), 0xff},

DEVICE( VLSI, VLSI_82C541, "82C541 Lynx"){0x1004, 0x000c, ("82C541 Lynx"), 0xff},

DEVICE( VLSI, VLSI_82C543, "82C543 Lynx ISA"){0x1004, 0x000d, ("82C543 Lynx ISA"), 0xff},

DEVICE( VLSI, VLSI_82C532, "82C532"){0x1004, 0x0101, ("82C532"), 0xff},

DEVICE( VLSI, VLSI_82C534, "82C534"){0x1004, 0x0102, ("82C534"), 0xff},

DEVICE( VLSI, VLSI_82C535, "82C535"){0x1004, 0x0104, ("82C535"), 0xff},

DEVICE( VLSI, VLSI_82C147, "82C147"){0x1004, 0x0105, ("82C147"), 0xff},

DEVICE( VLSI, VLSI_VAS96011, "VAS96011 (Golden Gate II)"){0x1004, 0x0702, ("VAS96011 (Golden Gate II)"), 0xff},

DEVICE( ADL, ADL_2301, "2301"){0x1005, 0x2301, ("2301"), 0xff},

DEVICE( NS, NS_87415, "87415"){0x100b, 0x0002, ("87415"), 0xff},

DEVICE( NS, NS_87410, "87410"){0x100b, 0xd001, ("87410"), 0xff},

DEVICE( TSENG, TSENG_W32P_2, "ET4000W32P"){0x100c, 0x3202, ("ET4000W32P"), 0xff},

DEVICE( TSENG, TSENG_W32P_b, "ET4000W32P rev B"){0x100c, 0x3205, ("ET4000W32P rev B"), 0xff},

DEVICE( TSENG, TSENG_W32P_c, "ET4000W32P rev C"){0x100c, 0x3206, ("ET4000W32P rev C"), 0xff},

DEVICE( TSENG, TSENG_W32P_d, "ET4000W32P rev D"){0x100c, 0x3207, ("ET4000W32P rev D"), 0xff},

DEVICE( TSENG, TSENG_ET6000, "ET6000"){0x100c, 0x3208, ("ET6000"), 0xff},

100

DEVICE( WEITEK, WEITEK_P9000, "P9000"){0x100e, 0x9001, ("P9000"), 0xff},

101

DEVICE( WEITEK, WEITEK_P9100, "P9100"){0x100e, 0x9100, ("P9100"), 0xff},

102

BRIDGE( DEC, DEC_BRD, "DC21050", 0x00){0x1011, 0x0001, ("DC21050"), (0x00)},

103

DEVICE( DEC, DEC_TULIP, "DC21040"){0x1011, 0x0002, ("DC21040"), 0xff},

104

DEVICE( DEC, DEC_TGA, "DC21030 (TGA)"){0x1011, 0x0004, ("DC21030 (TGA)"), 0xff},

105

DEVICE( DEC, DEC_TULIP_FAST, "DC21140"){0x1011, 0x0009, ("DC21140"), 0xff},

106

DEVICE( DEC, DEC_TGA2, "TGA2"){0x1011, 0x000D, ("TGA2"), 0xff},

107

DEVICE( DEC, DEC_FDDI, "DEFPA"){0x1011, 0x000F, ("DEFPA"), 0xff},

108

DEVICE( DEC, DEC_TULIP_PLUS, "DC21041"){0x1011, 0x0014, ("DC21041"), 0xff},

109

DEVICE( DEC, DEC_21142, "DC21142"){0x1011, 0x0019, ("DC21142"), 0xff},

110

DEVICE( DEC, DEC_21052, "DC21052"){0x1011, 0x0021, ("DC21052"), 0xff},

111

DEVICE( DEC, DEC_21150, "DC21150"){0x1011, 0x0022, ("DC21150"), 0xff},

112

DEVICE( DEC, DEC_21152, "DC21152"){0x1011, 0x0024, ("DC21152"), 0xff},

113

DEVICE( CIRRUS, CIRRUS_7548, "GD 7548"){0x1013, 0x0038, ("GD 7548"), 0xff},

114

DEVICE( CIRRUS, CIRRUS_5430, "GD 5430"){0x1013, 0x00a0, ("GD 5430"), 0xff},

115

DEVICE( CIRRUS, CIRRUS_5434_4, "GD 5434"){0x1013, 0x00a4, ("GD 5434"), 0xff},

116

DEVICE( CIRRUS, CIRRUS_5434_8, "GD 5434"){0x1013, 0x00a8, ("GD 5434"), 0xff},

117

DEVICE( CIRRUS, CIRRUS_5436, "GD 5436"){0x1013, 0x00ac, ("GD 5436"), 0xff},

118

DEVICE( CIRRUS, CIRRUS_5446, "GD 5446"){0x1013, 0x00b8, ("GD 5446"), 0xff},

119

DEVICE( CIRRUS, CIRRUS_5480, "GD 5480"){0x1013, 0x00bc, ("GD 5480"), 0xff},

120

DEVICE( CIRRUS, CIRRUS_5464, "GD 5464"){0x1013, 0x00d4, ("GD 5464"), 0xff},

121

DEVICE( CIRRUS, CIRRUS_5465, "GD 5465"){0x1013, 0x00d6, ("GD 5465"), 0xff},

122

DEVICE( CIRRUS, CIRRUS_6729, "CL 6729"){0x1013, 0x1100, ("CL 6729"), 0xff},

123

DEVICE( CIRRUS, CIRRUS_6832, "PD 6832"){0x1013, 0x1110, ("PD 6832"), 0xff},

124

DEVICE( CIRRUS, CIRRUS_7542, "CL 7542"){0x1013, 0x1200, ("CL 7542"), 0xff},

125

DEVICE( CIRRUS, CIRRUS_7543, "CL 7543"){0x1013, 0x1202, ("CL 7543"), 0xff},

126

DEVICE( CIRRUS, CIRRUS_7541, "CL 7541"){0x1013, 0x1204, ("CL 7541"), 0xff},

127

DEVICE( IBM, IBM_FIRE_CORAL, "Fire Coral"){0x1014, 0x000a, ("Fire Coral"), 0xff},

128

DEVICE( IBM, IBM_TR, "Token Ring"){0x1014, 0x0018, ("Token Ring"), 0xff},

129

DEVICE( IBM, IBM_82G2675, "82G2675"){0x1014, 0x001d, ("82G2675"), 0xff},

130

DEVICE( IBM, IBM_MCA, "MicroChannel"){0x1014, 0x0020, ("MicroChannel"), 0xff},

131

DEVICE( IBM, IBM_82351, "82351"){0x1014, 0x0022, ("82351"), 0xff},

132

DEVICE( IBM, IBM_SERVERAID, "ServeRAID"){0x1014, 0x002e, ("ServeRAID"), 0xff},

133

DEVICE( IBM, IBM_TR_WAKE, "Wake On LAN Token Ring"){0x1014, 0x003e, ("Wake On LAN Token Ring"), 0xff},

134

DEVICE( IBM, IBM_3780IDSP, "MWave DSP"){0x1014, 0x007d, ("MWave DSP"), 0xff},

135

DEVICE( WD, WD_7197, "WD 7197"){0x101c, 0x3296, ("WD 7197"), 0xff},

136

DEVICE( AMD, AMD_LANCE, "79C970"){0x1022, 0x2000, ("79C970"), 0xff},

137

DEVICE( AMD, AMD_SCSI, "53C974"){0x1022, 0x2020, ("53C974"), 0xff},

138

DEVICE( TRIDENT, TRIDENT_9397, "Cyber9397"){0x1023, 0x9397, ("Cyber9397"), 0xff},

139

DEVICE( TRIDENT, TRIDENT_9420, "TG 9420"){0x1023, 0x9420, ("TG 9420"), 0xff},

140

DEVICE( TRIDENT, TRIDENT_9440, "TG 9440"){0x1023, 0x9440, ("TG 9440"), 0xff},

141

DEVICE( TRIDENT, TRIDENT_9660, "TG 9660 / Cyber9385"){0x1023, 0x9660, ("TG 9660 / Cyber9385"), 0xff},

142

DEVICE( TRIDENT, TRIDENT_9750, "Image 975"){0x1023, 0x9750, ("Image 975"), 0xff},

143

DEVICE( AI, AI_M1435, "M1435"){0x1025, 0x1435, ("M1435"), 0xff},

144

DEVICE( MATROX, MATROX_MGA_2, "Atlas PX2085"){0x102B, 0x0518, ("Atlas PX2085"), 0xff},

145

DEVICE( MATROX, MATROX_MIL, "Millennium"){0x102B, 0x0519, ("Millennium"), 0xff},

146

DEVICE( MATROX, MATROX_MYS, "Mystique"){0x102B, 0x051A, ("Mystique"), 0xff},

147

DEVICE( MATROX, MATROX_MIL_2, "Millennium II"){0x102B, 0x051b, ("Millennium II"), 0xff},

148

DEVICE( MATROX, MATROX_MIL_2_AGP,"Millennium II AGP"){0x102B, 0x051f, ("Millennium II AGP"), 0xff},

149

DEVICE( MATROX, MATROX_MGA_IMP, "MGA Impression"){0x102B, 0x0d10, ("MGA Impression"), 0xff},

150

DEVICE( CT, CT_65545, "65545"){0x102c, 0x00d8, ("65545"), 0xff},

151

DEVICE( CT, CT_65548, "65548"){0x102c, 0x00dc, ("65548"), 0xff},

152

DEVICE( CT, CT_65550, "65550"){0x102c, 0x00e0, ("65550"), 0xff},

153

DEVICE( CT, CT_65554, "65554"){0x102c, 0x00e4, ("65554"), 0xff},

154

DEVICE( CT, CT_65555, "65555"){0x102c, 0x00e5, ("65555"), 0xff},

155

DEVICE( MIRO, MIRO_36050, "ZR36050"){0x1031, 0x5601, ("ZR36050"), 0xff},

156

DEVICE( NEC, NEC_PCX2, "PowerVR PCX2"){0x1033, 0x0046, ("PowerVR PCX2"), 0xff},

157

DEVICE( FD, FD_36C70, "TMC-18C30"){0x1036, 0x0000, ("TMC-18C30"), 0xff},

158

DEVICE( SI, SI_5591_AGP, "5591/5592 AGP"){0x1039, 0x0001, ("5591/5592 AGP"), 0xff},

159

DEVICE( SI, SI_6202, "6202"){0x1039, 0x0002, ("6202"), 0xff},

160

DEVICE( SI, SI_503, "85C503"){0x1039, 0x0008, ("85C503"), 0xff},

161

DEVICE( SI, SI_ACPI, "ACPI"){0x1039, 0x0009, ("ACPI"), 0xff},

162

DEVICE( SI, SI_5597_VGA, "5597/5598 VGA"){0x1039, 0x0200, ("5597/5598 VGA"), 0xff},

163

DEVICE( SI, SI_6205, "6205"){0x1039, 0x0205, ("6205"), 0xff},

164

DEVICE( SI, SI_501, "85C501"){0x1039, 0x0406, ("85C501"), 0xff},

165

DEVICE( SI, SI_496, "85C496"){0x1039, 0x0496, ("85C496"), 0xff},

166

DEVICE( SI, SI_601, "85C601"){0x1039, 0x0601, ("85C601"), 0xff},

167

DEVICE( SI, SI_5107, "5107"){0x1039, 0x5107, ("5107"), 0xff},

168

DEVICE( SI, SI_5511, "85C5511"){0x1039, 0x5511, ("85C5511"), 0xff},

169

DEVICE( SI, SI_5513, "85C5513"){0x1039, 0x5513, ("85C5513"), 0xff},

170

DEVICE( SI, SI_5571, "5571"){0x1039, 0x5571, ("5571"), 0xff},

171

DEVICE( SI, SI_5591, "5591/5592 Host"){0x1039, 0x5591, ("5591/5592 Host"), 0xff},

172

DEVICE( SI, SI_5597, "5597/5598 Host"){0x1039, 0x5597, ("5597/5598 Host"), 0xff},

173

DEVICE( SI, SI_7001, "7001 USB"){0x1039, 0x7001, ("7001 USB"), 0xff},

174

DEVICE( HP, HP_J2585A, "J2585A"){0x103c, 0x1030, ("J2585A"), 0xff},

175

DEVICE( HP, HP_J2585B, "J2585B (Lassen)"){0x103c, 0x1031, ("J2585B (Lassen)"), 0xff},

176

DEVICE( PCTECH, PCTECH_RZ1000, "RZ1000 (buggy)"){0x1042, 0x1000, ("RZ1000 (buggy)"), 0xff},

177

DEVICE( PCTECH, PCTECH_RZ1001, "RZ1001 (buggy?)"){0x1042, 0x1001, ("RZ1001 (buggy?)"), 0xff},

178

DEVICE( PCTECH, PCTECH_SAMURAI_0,"Samurai 0"){0x1042, 0x3000, ("Samurai 0"), 0xff},

179

DEVICE( PCTECH, PCTECH_SAMURAI_1,"Samurai 1"){0x1042, 0x3010, ("Samurai 1"), 0xff},

180

DEVICE( PCTECH, PCTECH_SAMURAI_IDE,"Samurai IDE"){0x1042, 0x3020, ("Samurai IDE"), 0xff},

181

DEVICE( DPT, DPT, "SmartCache/Raid"){0x1044, 0xa400, ("SmartCache/Raid"), 0xff},

182

DEVICE( OPTI, OPTI_92C178, "92C178"){0x1045, 0xc178, ("92C178"), 0xff},

183

DEVICE( OPTI, OPTI_82C557, "82C557 Viper-M"){0x1045, 0xc557, ("82C557 Viper-M"), 0xff},

184

DEVICE( OPTI, OPTI_82C558, "82C558 Viper-M ISA+IDE"){0x1045, 0xc558, ("82C558 Viper-M ISA+IDE"), 0xff},

185

DEVICE( OPTI, OPTI_82C621, "82C621"){0x1045, 0xc621, ("82C621"), 0xff},

186

DEVICE( OPTI, OPTI_82C700, "82C700"){0x1045, 0xc700, ("82C700"), 0xff},

187

DEVICE( OPTI, OPTI_82C701, "82C701 FireStar Plus"){0x1045, 0xc701, ("82C701 FireStar Plus"), 0xff},

188

DEVICE( OPTI, OPTI_82C814, "82C814 Firebridge 1"){0x1045, 0xc814, ("82C814 Firebridge 1"), 0xff},

189

DEVICE( OPTI, OPTI_82C822, "82C822"){0x1045, 0xc822, ("82C822"), 0xff},

190

DEVICE( OPTI, OPTI_82C825, "82C825 Firebridge 2"){0x1045, 0xd568, ("82C825 Firebridge 2"), 0xff},

191

DEVICE( SGS, SGS_2000, "STG 2000X"){0x104a, 0x0008, ("STG 2000X"), 0xff},

192

DEVICE( SGS, SGS_1764, "STG 1764X"){0x104a, 0x0009, ("STG 1764X"), 0xff},

193

DEVICE( BUSLOGIC, BUSLOGIC_MULTIMASTER_NC, "MultiMaster NC"){0x104B, 0x0140, ("MultiMaster NC"), 0xff},

194

DEVICE( BUSLOGIC, BUSLOGIC_MULTIMASTER, "MultiMaster"){0x104B, 0x1040, ("MultiMaster"), 0xff},

195

DEVICE( BUSLOGIC, BUSLOGIC_FLASHPOINT, "FlashPoint"){0x104B, 0x8130, ("FlashPoint"), 0xff},

196

DEVICE( TI, TI_TVP4010, "TVP4010 Permedia"){0x104c, 0x3d04, ("TVP4010 Permedia"), 0xff},

197

DEVICE( TI, TI_TVP4020, "TVP4020 Permedia 2"){0x104c, 0x3d07, ("TVP4020 Permedia 2"), 0xff},

198

DEVICE( TI, TI_PCI1130, "PCI1130"){0x104c, 0xac12, ("PCI1130"), 0xff},

199

DEVICE( TI, TI_PCI1131, "PCI1131"){0x104c, 0xac15, ("PCI1131"), 0xff},

200

DEVICE( TI, TI_PCI1250, "PCI1250"){0x104c, 0xac16, ("PCI1250"), 0xff},

201

DEVICE( OAK, OAK_OTI107, "OTI107"){0x104e, 0x0107, ("OTI107"), 0xff},

202

DEVICE( WINBOND2, WINBOND2_89C940,"NE2000-PCI"){0x1050, 0x0940, ("NE2000-PCI"), 0xff},

203

DEVICE( MOTOROLA, MOTOROLA_MPC105,"MPC105 Eagle"){0x1057, 0x0001, ("MPC105 Eagle"), 0xff},

204

DEVICE( MOTOROLA, MOTOROLA_MPC106,"MPC106 Grackle"){0x1057, 0x0002, ("MPC106 Grackle"), 0xff},

205

DEVICE( MOTOROLA, MOTOROLA_RAVEN, "Raven"){0x1057, 0x4801, ("Raven"), 0xff},

206

DEVICE( PROMISE, PROMISE_20246, "IDE UltraDMA/33"){0x105a, 0x4d33, ("IDE UltraDMA/33"), 0xff},

207

DEVICE( PROMISE, PROMISE_5300, "DC5030"){0x105a, 0x5300, ("DC5030"), 0xff},

208

DEVICE( N9, N9_I128, "Imagine 128"){0x105d, 0x2309, ("Imagine 128"), 0xff},

209

DEVICE( N9, N9_I128_2, "Imagine 128v2"){0x105d, 0x2339, ("Imagine 128v2"), 0xff},

210

DEVICE( UMC, UMC_UM8673F, "UM8673F"){0x1060, 0x0101, ("UM8673F"), 0xff},

211

BRIDGE( UMC, UMC_UM8891A, "UM8891A", 0x01){0x1060, 0x0891, ("UM8891A"), (0x01)},

212

DEVICE( UMC, UMC_UM8886BF, "UM8886BF"){0x1060, 0x673a, ("UM8886BF"), 0xff},

213

DEVICE( UMC, UMC_UM8886A, "UM8886A"){0x1060, 0x886a, ("UM8886A"), 0xff},

214

BRIDGE( UMC, UMC_UM8881F, "UM8881F", 0x02){0x1060, 0x8881, ("UM8881F"), (0x02)},

215

DEVICE( UMC, UMC_UM8886F, "UM8886F"){0x1060, 0x8886, ("UM8886F"), 0xff},

216

DEVICE( UMC, UMC_UM9017F, "UM9017F"){0x1060, 0x9017, ("UM9017F"), 0xff},

217

DEVICE( UMC, UMC_UM8886N, "UM8886N"){0x1060, 0xe886, ("UM8886N"), 0xff},

218

DEVICE( UMC, UMC_UM8891N, "UM8891N"){0x1060, 0xe891, ("UM8891N"), 0xff},

219

DEVICE( X, X_AGX016, "ITT AGX016"){0x1061, 0x0001, ("ITT AGX016"), 0xff},

220

DEVICE( PICOP, PICOP_PT86C52X, "PT86C52x Vesuvius"){0x1066, 0x0001, ("PT86C52x Vesuvius"), 0xff},

221

DEVICE( PICOP, PICOP_PT80C524, "PT80C524 Nile"){0x1066, 0x8002, ("PT80C524 Nile"), 0xff},

222

DEVICE( APPLE, APPLE_BANDIT, "Bandit"){0x106b, 0x0001, ("Bandit"), 0xff},

223

DEVICE( APPLE, APPLE_GC, "Grand Central"){0x106b, 0x0002, ("Grand Central"), 0xff},

224

DEVICE( APPLE, APPLE_HYDRA, "Hydra"){0x106b, 0x000e, ("Hydra"), 0xff},

225

DEVICE( NEXGEN, NEXGEN_82C501, "82C501"){0x1074, 0x4e78, ("82C501"), 0xff},

226

DEVICE( QLOGIC, QLOGIC_ISP1020, "ISP1020"){0x1077, 0x1020, ("ISP1020"), 0xff},

227

DEVICE( QLOGIC, QLOGIC_ISP1022, "ISP1022"){0x1077, 0x1022, ("ISP1022"), 0xff},

228

DEVICE( CYRIX, CYRIX_5510, "5510"){0x1078, 0x0000, ("5510"), 0xff},

229

DEVICE( CYRIX, CYRIX_PCI_MASTER,"PCI Master"){0x1078, 0x0001, ("PCI Master"), 0xff},

230

DEVICE( CYRIX, CYRIX_5520, "5520"){0x1078, 0x0002, ("5520"), 0xff},

231

DEVICE( CYRIX, CYRIX_5530_LEGACY,"5530 Kahlua Legacy"){0x1078, 0x0100, ("5530 Kahlua Legacy"), 0xff},

232

DEVICE( CYRIX, CYRIX_5530_SMI, "5530 Kahlua SMI"){0x1078, 0x0101, ("5530 Kahlua SMI"), 0xff},

233

DEVICE( CYRIX, CYRIX_5530_IDE, "5530 Kahlua IDE"){0x1078, 0x0102, ("5530 Kahlua IDE"), 0xff},

234

DEVICE( CYRIX, CYRIX_5530_AUDIO,"5530 Kahlua Audio"){0x1078, 0x0103, ("5530 Kahlua Audio"), 0xff},

235

DEVICE( CYRIX, CYRIX_5530_VIDEO,"5530 Kahlua Video"){0x1078, 0x0104, ("5530 Kahlua Video"), 0xff},

236

DEVICE( LEADTEK, LEADTEK_805, "S3 805"){0x107d, 0x0000, ("S3 805"), 0xff},

237

DEVICE( CONTAQ, CONTAQ_82C599, "82C599"){0x1080, 0x0600, ("82C599"), 0xff},

238

DEVICE( CONTAQ, CONTAQ_82C693, "82C693"){0x1080, 0xc693, ("82C693"), 0xff},

239

DEVICE( OLICOM, OLICOM_OC3136, "OC-3136/3137"){0x108d, 0x0001, ("OC-3136/3137"), 0xff},

240

DEVICE( OLICOM, OLICOM_OC2315, "OC-2315"){0x108d, 0x0011, ("OC-2315"), 0xff},

241

DEVICE( OLICOM, OLICOM_OC2325, "OC-2325"){0x108d, 0x0012, ("OC-2325"), 0xff},

242

DEVICE( OLICOM, OLICOM_OC2183, "OC-2183/2185"){0x108d, 0x0013, ("OC-2183/2185"), 0xff},

243

DEVICE( OLICOM, OLICOM_OC2326, "OC-2326"){0x108d, 0x0014, ("OC-2326"), 0xff},

244

DEVICE( OLICOM, OLICOM_OC6151, "OC-6151/6152"){0x108d, 0x0021, ("OC-6151/6152"), 0xff},

245

DEVICE( SUN, SUN_EBUS, "EBUS"){0x108e, 0x1000, ("EBUS"), 0xff},

246

DEVICE( SUN, SUN_HAPPYMEAL, "Happy Meal Ethernet"){0x108e, 0x1001, ("Happy Meal Ethernet"), 0xff},

247

DEVICE( SUN, SUN_SIMBA, "Advanced PCI Bridge"){0x108e, 0x5000, ("Advanced PCI Bridge"), 0xff},

248

DEVICE( SUN, SUN_PBM, "PCI Bus Module"){0x108e, 0x8000, ("PCI Bus Module"), 0xff},

249

DEVICE( SUN, SUN_SABRE, "Ultra IIi PCI"){0x108e, 0xa000, ("Ultra IIi PCI"), 0xff},

250

DEVICE( CMD, CMD_640, "640 (buggy)"){0x1095, 0x0640, ("640 (buggy)"), 0xff},

251

DEVICE( CMD, CMD_643, "643"){0x1095, 0x0643, ("643"), 0xff},

252

DEVICE( CMD, CMD_646, "646"){0x1095, 0x0646, ("646"), 0xff},

253

DEVICE( CMD, CMD_670, "670"){0x1095, 0x0670, ("670"), 0xff},

254

DEVICE( VISION, VISION_QD8500, "QD-8500"){0x1098, 0x0001, ("QD-8500"), 0xff},

255

DEVICE( VISION, VISION_QD8580, "QD-8580"){0x1098, 0x0002, ("QD-8580"), 0xff},

256

DEVICE( BROOKTREE, BROOKTREE_848, "Bt848"){0x109e, 0x0350, ("Bt848"), 0xff},

257

DEVICE( BROOKTREE, BROOKTREE_849A, "Bt849"){0x109e, 0x0351, ("Bt849"), 0xff},

258

DEVICE( BROOKTREE, BROOKTREE_8474, "Bt8474"){0x109e, 0x8474, ("Bt8474"), 0xff},

259

DEVICE( SIERRA, SIERRA_STB, "STB Horizon 64"){0x10a8, 0x0000, ("STB Horizon 64"), 0xff},

260

DEVICE( ACC, ACC_2056, "2056"){0x10aa, 0x0000, ("2056"), 0xff},

261

DEVICE( WINBOND, WINBOND_83769, "W83769F"){0x10ad, 0x0001, ("W83769F"), 0xff},

262

DEVICE( WINBOND, WINBOND_82C105, "SL82C105"){0x10ad, 0x0105, ("SL82C105"), 0xff},

263

DEVICE( WINBOND, WINBOND_83C553, "W83C553"){0x10ad, 0x0565, ("W83C553"), 0xff},

264

DEVICE( DATABOOK, DATABOOK_87144, "DB87144"){0x10b3, 0xb106, ("DB87144"), 0xff},

265

DEVICE( PLX, PLX_SPCOM200, "SPCom 200 PCI serial I/O"){0x10b5, 0x1103, ("SPCom 200 PCI serial I/O"), 0xff},

266

DEVICE( PLX, PLX_9050, "PLX9050 PCI <-> IOBus Bridge"){0x10b5, 0x9050, ("PLX9050 PCI <-> IOBus Bridge"), 0xff
},

267

DEVICE( PLX, PLX_9080, "PCI9080 I2O"){0x10b5, 0x9080, ("PCI9080 I2O"), 0xff},

268

DEVICE( MADGE, MADGE_MK2, "Smart 16/4 BM Mk2 Ringnode"){0x10b6, 0x0002, ("Smart 16/4 BM Mk2 Ringnode"), 0xff},

269

DEVICE( 3COM, 3COM_3C339, "3C339 TokenRing"){0x10b7, 0x3390, ("3C339 TokenRing"), 0xff},

270

DEVICE( 3COM, 3COM_3C590, "3C590 10bT"){0x10b7, 0x5900, ("3C590 10bT"), 0xff},

271

DEVICE( 3COM, 3COM_3C595TX, "3C595 100bTX"){0x10b7, 0x5950, ("3C595 100bTX"), 0xff},

272

DEVICE( 3COM, 3COM_3C595T4, "3C595 100bT4"){0x10b7, 0x5951, ("3C595 100bT4"), 0xff},

273

DEVICE( 3COM, 3COM_3C595MII, "3C595 100b-MII"){0x10b7, 0x5952, ("3C595 100b-MII"), 0xff},

274

DEVICE( 3COM, 3COM_3C900TPO, "3C900 10bTPO"){0x10b7, 0x9000, ("3C900 10bTPO"), 0xff},

275

DEVICE( 3COM, 3COM_3C900COMBO,"3C900 10b Combo"){0x10b7, 0x9001, ("3C900 10b Combo"), 0xff},

276

DEVICE( 3COM, 3COM_3C905TX, "3C905 100bTX"){0x10b7, 0x9050, ("3C905 100bTX"), 0xff},

277

DEVICE( 3COM, 3COM_3C905T4, "3C905 100bT4"){0x10b7, 0x9051, ("3C905 100bT4"), 0xff},

278

DEVICE( 3COM, 3COM_3C905B_TX, "3C905B 100bTX"){0x10b7, 0x9055, ("3C905B 100bTX"), 0xff},

279

DEVICE( SMC, SMC_EPIC100, "9432 TX"){0x10b8, 0x0005, ("9432 TX"), 0xff},

280

DEVICE( AL, AL_M1445, "M1445"){0x10b9, 0x1445, ("M1445"), 0xff},

281

DEVICE( AL, AL_M1449, "M1449"){0x10b9, 0x1449, ("M1449"), 0xff},

282

DEVICE( AL, AL_M1451, "M1451"){0x10b9, 0x1451, ("M1451"), 0xff},

283

DEVICE( AL, AL_M1461, "M1461"){0x10b9, 0x1461, ("M1461"), 0xff},

284

DEVICE( AL, AL_M1489, "M1489"){0x10b9, 0x1489, ("M1489"), 0xff},

285

DEVICE( AL, AL_M1511, "M1511"){0x10b9, 0x1511, ("M1511"), 0xff},

286

DEVICE( AL, AL_M1513, "M1513"){0x10b9, 0x1513, ("M1513"), 0xff},

287

DEVICE( AL, AL_M1521, "M1521"){0x10b9, 0x1521, ("M1521"), 0xff},

288

DEVICE( AL, AL_M1523, "M1523"){0x10b9, 0x1523, ("M1523"), 0xff},

289

DEVICE( AL, AL_M1531, "M1531 Aladdin IV"){0x10b9, 0x1531, ("M1531 Aladdin IV"), 0xff},

290

DEVICE( AL, AL_M1533, "M1533 Aladdin IV"){0x10b9, 0x1533, ("M1533 Aladdin IV"), 0xff},

291

DEVICE( AL, AL_M3307, "M3307 MPEG-1 decoder"){0x10b9, 0x3307, ("M3307 MPEG-1 decoder"), 0xff},

292

DEVICE( AL, AL_M4803, "M4803"){0x10b9, 0x5215, ("M4803"), 0xff},

293

DEVICE( AL, AL_M5219, "M5219"){0x10b9, 0x5219, ("M5219"), 0xff},

294

DEVICE( AL, AL_M5229, "M5229 TXpro"){0x10b9, 0x5229, ("M5229 TXpro"), 0xff},

295

DEVICE( AL, AL_M5237, "M5237 USB"){0x10b9, 0x5237, ("M5237 USB"), 0xff},

296

DEVICE( SURECOM, SURECOM_NE34, "NE-34PCI LAN"){0x10bd, 0x0e34, ("NE-34PCI LAN"), 0xff},

297

DEVICE( NEOMAGIC, NEOMAGIC_MAGICGRAPH_NM2070, "Magicgraph NM2070"){0x10c8, 0x0001, ("Magicgraph NM2070"), 0xff},

298

DEVICE( NEOMAGIC, NEOMAGIC_MAGICGRAPH_128V, "MagicGraph 128V"){0x10c8, 0x0002, ("MagicGraph 128V"), 0xff},

299

DEVICE( NEOMAGIC, NEOMAGIC_MAGICGRAPH_128ZV, "MagicGraph 128ZV"){0x10c8, 0x0003, ("MagicGraph 128ZV"), 0xff},

300

DEVICE( NEOMAGIC, NEOMAGIC_MAGICGRAPH_NM2160, "MagicGraph NM2160"){0x10c8, 0x0004, ("MagicGraph NM2160"), 0xff},

301

DEVICE( ASP, ASP_ABP940, "ABP940"){0x10cd, 0x1200, ("ABP940"), 0xff},

302

DEVICE( ASP, ASP_ABP940U, "ABP940U"){0x10cd, 0x1300, ("ABP940U"), 0xff},

303

DEVICE( ASP, ASP_ABP940UW, "ABP940UW"){0x10cd, 0x2300, ("ABP940UW"), 0xff},

304

DEVICE( MACRONIX, MACRONIX_MX98713,"MX98713"){0x10d9, 0x0512, ("MX98713"), 0xff},

305

DEVICE( MACRONIX, MACRONIX_MX987x5,"MX98715 / MX98725"){0x10d9, 0x0531, ("MX98715 / MX98725"), 0xff},

306

DEVICE( CERN, CERN_SPSB_PMC, "STAR/RD24 SCI-PCI (PMC)"){0x10dc, 0x0001, ("STAR/RD24 SCI-PCI (PMC)"), 0xff},

307

DEVICE( CERN, CERN_SPSB_PCI, "STAR/RD24 SCI-PCI (PMC)"){0x10dc, 0x0002, ("STAR/RD24 SCI-PCI (PMC)"), 0xff},

308

DEVICE( CERN, CERN_HIPPI_DST, "HIPPI destination"){0x10dc, 0x0021, ("HIPPI destination"), 0xff},

309

DEVICE( CERN, CERN_HIPPI_SRC, "HIPPI source"){0x10dc, 0x0022, ("HIPPI source"), 0xff},

310

DEVICE( IMS, IMS_8849, "8849"){0x10e0, 0x8849, ("8849"), 0xff},

311

DEVICE( TEKRAM2, TEKRAM2_690c, "DC690c"){0x10e1, 0x690c, ("DC690c"), 0xff},

312

DEVICE( TUNDRA, TUNDRA_CA91C042,"CA91C042 Universe"){0x10e3, 0x0000, ("CA91C042 Universe"), 0xff},

313

DEVICE( AMCC, AMCC_MYRINET, "Myrinet PCI (M2-PCI-32)"){0x10e8, 0x8043, ("Myrinet PCI (M2-PCI-32)"), 0xff},

314

DEVICE( AMCC, AMCC_S5933, "S5933"){0x10e8, 0x807d, ("S5933"), 0xff},

315

DEVICE( AMCC, AMCC_S5933_HEPC3,"S5933 Traquair HEPC3"){0x10e8, 0x809c, ("S5933 Traquair HEPC3"), 0xff},

316

DEVICE( INTERG, INTERG_1680, "IGA-1680"){0x10ea, 0x1680, ("IGA-1680"), 0xff},

317

DEVICE( INTERG, INTERG_1682, "IGA-1682"){0x10ea, 0x1682, ("IGA-1682"), 0xff},

318

DEVICE( REALTEK, REALTEK_8029, "8029"){0x10ec, 0x8029, ("8029"), 0xff},

319

DEVICE( REALTEK, REALTEK_8129, "8129"){0x10ec, 0x8129, ("8129"), 0xff},

320

DEVICE( REALTEK, REALTEK_8139, "8139"){0x10ec, 0x8139, ("8139"), 0xff},

321

DEVICE( TRUEVISION, TRUEVISION_T1000,"TARGA 1000"){0x10fa, 0x000c, ("TARGA 1000"), 0xff},

322

DEVICE( INIT, INIT_320P, "320 P"){0x1101, 0x9100, ("320 P"), 0xff},

323

DEVICE( INIT, INIT_360P, "360 P"){0x1101, 0x9500, ("360 P"), 0xff},

324

DEVICE( VIA, VIA_82C505, "VT 82C505"){0x1106, 0x0505, ("VT 82C505"), 0xff},

325

DEVICE( VIA, VIA_82C561, "VT 82C561"){0x1106, 0x0561, ("VT 82C561"), 0xff},

326

DEVICE( VIA, VIA_82C586_1, "VT 82C586 Apollo IDE"){0x1106, 0x0571, ("VT 82C586 Apollo IDE"), 0xff},

327

DEVICE( VIA, VIA_82C576, "VT 82C576 3V"){0x1106, 0x0576, ("VT 82C576 3V"), 0xff},

328

DEVICE( VIA, VIA_82C585, "VT 82C585 Apollo VP1/VPX"){0x1106, 0x0585, ("VT 82C585 Apollo VP1/VPX"), 0xff},

329

DEVICE( VIA, VIA_82C586_0, "VT 82C586 Apollo ISA"){0x1106, 0x0586, ("VT 82C586 Apollo ISA"), 0xff},

330

DEVICE( VIA, VIA_82C595, "VT 82C595 Apollo VP2"){0x1106, 0x0595, ("VT 82C595 Apollo VP2"), 0xff},

331

DEVICE( VIA, VIA_82C597_0, "VT 82C597 Apollo VP3"){0x1106, 0x0597, ("VT 82C597 Apollo VP3"), 0xff},

332

DEVICE( VIA, VIA_82C926, "VT 82C926 Amazon"){0x1106, 0x0926, ("VT 82C926 Amazon"), 0xff},

333

DEVICE( VIA, VIA_82C416, "VT 82C416MV"){0x1106, 0x1571, ("VT 82C416MV"), 0xff},

334

DEVICE( VIA, VIA_82C595_97, "VT 82C595 Apollo VP2/97"){0x1106, 0x1595, ("VT 82C595 Apollo VP2/97"), 0xff},

335

DEVICE( VIA, VIA_82C586_2, "VT 82C586 Apollo USB"){0x1106, 0x3038, ("VT 82C586 Apollo USB"), 0xff},

336

DEVICE( VIA, VIA_82C586_3, "VT 82C586B Apollo ACPI"){0x1106, 0x3040, ("VT 82C586B Apollo ACPI"), 0xff},

337

DEVICE( VIA, VIA_86C100A, "VT 86C100A"){0x1106, 0x6100, ("VT 86C100A"), 0xff},

338

DEVICE( VIA, VIA_82C597_1, "VT 82C597 Apollo VP3 AGP"){0x1106, 0x8597, ("VT 82C597 Apollo VP3 AGP"), 0xff},

339

DEVICE( VORTEX, VORTEX_GDT60x0, "GDT 60x0"){0x1119, 0x0000, ("GDT 60x0"), 0xff},

340

DEVICE( VORTEX, VORTEX_GDT6000B,"GDT 6000b"){0x1119, 0x0001, ("GDT 6000b"), 0xff},

341

DEVICE( VORTEX, VORTEX_GDT6x10, "GDT 6110/6510"){0x1119, 0x0002, ("GDT 6110/6510"), 0xff},

342

DEVICE( VORTEX, VORTEX_GDT6x20, "GDT 6120/6520"){0x1119, 0x0003, ("GDT 6120/6520"), 0xff},

343

DEVICE( VORTEX, VORTEX_GDT6530, "GDT 6530"){0x1119, 0x0004, ("GDT 6530"), 0xff},

344

DEVICE( VORTEX, VORTEX_GDT6550, "GDT 6550"){0x1119, 0x0005, ("GDT 6550"), 0xff},

345

DEVICE( VORTEX, VORTEX_GDT6x17, "GDT 6117/6517"){0x1119, 0x0006, ("GDT 6117/6517"), 0xff},

346

DEVICE( VORTEX, VORTEX_GDT6x27, "GDT 6127/6527"){0x1119, 0x0007, ("GDT 6127/6527"), 0xff},

347

DEVICE( VORTEX, VORTEX_GDT6537, "GDT 6537"){0x1119, 0x0008, ("GDT 6537"), 0xff},

348

DEVICE( VORTEX, VORTEX_GDT6557, "GDT 6557"){0x1119, 0x0009, ("GDT 6557"), 0xff},

349

DEVICE( VORTEX, VORTEX_GDT6x15, "GDT 6115/6515"){0x1119, 0x000a, ("GDT 6115/6515"), 0xff},

350

DEVICE( VORTEX, VORTEX_GDT6x25, "GDT 6125/6525"){0x1119, 0x000b, ("GDT 6125/6525"), 0xff},

351

DEVICE( VORTEX, VORTEX_GDT6535, "GDT 6535"){0x1119, 0x000c, ("GDT 6535"), 0xff},

352

DEVICE( VORTEX, VORTEX_GDT6555, "GDT 6555"){0x1119, 0x000d, ("GDT 6555"), 0xff},

353

DEVICE( VORTEX, VORTEX_GDT6x17RP,"GDT 6117RP/6517RP"){0x1119, 0x0100, ("GDT 6117RP/6517RP"), 0xff},

354

DEVICE( VORTEX, VORTEX_GDT6x27RP,"GDT 6127RP/6527RP"){0x1119, 0x0101, ("GDT 6127RP/6527RP"), 0xff},

355

DEVICE( VORTEX, VORTEX_GDT6537RP,"GDT 6537RP"){0x1119, 0x0102, ("GDT 6537RP"), 0xff},

356

DEVICE( VORTEX, VORTEX_GDT6557RP,"GDT 6557RP"){0x1119, 0x0103, ("GDT 6557RP"), 0xff},

357

DEVICE( VORTEX, VORTEX_GDT6x11RP,"GDT 6111RP/6511RP"){0x1119, 0x0104, ("GDT 6111RP/6511RP"), 0xff},

358

DEVICE( VORTEX, VORTEX_GDT6x21RP,"GDT 6121RP/6521RP"){0x1119, 0x0105, ("GDT 6121RP/6521RP"), 0xff},

359

DEVICE( VORTEX, VORTEX_GDT6x17RP1,"GDT 6117RP1/6517RP1"){0x1119, 0x0110, ("GDT 6117RP1/6517RP1"), 0xff},

360

DEVICE( VORTEX, VORTEX_GDT6x27RP1,"GDT 6127RP1/6527RP1"){0x1119, 0x0111, ("GDT 6127RP1/6527RP1"), 0xff},

361

DEVICE( VORTEX, VORTEX_GDT6537RP1,"GDT 6537RP1"){0x1119, 0x0112, ("GDT 6537RP1"), 0xff},

362

DEVICE( VORTEX, VORTEX_GDT6557RP1,"GDT 6557RP1"){0x1119, 0x0113, ("GDT 6557RP1"), 0xff},

363

DEVICE( VORTEX, VORTEX_GDT6x11RP1,"GDT 6111RP1/6511RP1"){0x1119, 0x0114, ("GDT 6111RP1/6511RP1"), 0xff},

364

DEVICE( VORTEX, VORTEX_GDT6x21RP1,"GDT 6121RP1/6521RP1"){0x1119, 0x0115, ("GDT 6121RP1/6521RP1"), 0xff},

365

DEVICE( VORTEX, VORTEX_GDT6x17RP2,"GDT 6117RP2/6517RP2"){0x1119, 0x0120, ("GDT 6117RP2/6517RP2"), 0xff},

366

DEVICE( VORTEX, VORTEX_GDT6x27RP2,"GDT 6127RP2/6527RP2"){0x1119, 0x0121, ("GDT 6127RP2/6527RP2"), 0xff},

367

DEVICE( VORTEX, VORTEX_GDT6537RP2,"GDT 6537RP2"){0x1119, 0x0122, ("GDT 6537RP2"), 0xff},

368

DEVICE( VORTEX, VORTEX_GDT6557RP2,"GDT 6557RP2"){0x1119, 0x0123, ("GDT 6557RP2"), 0xff},

369

DEVICE( VORTEX, VORTEX_GDT6x11RP2,"GDT 6111RP2/6511RP2"){0x1119, 0x0124, ("GDT 6111RP2/6511RP2"), 0xff},

370

DEVICE( VORTEX, VORTEX_GDT6x21RP2,"GDT 6121RP2/6521RP2"){0x1119, 0x0125, ("GDT 6121RP2/6521RP2"), 0xff},

371

DEVICE( EF, EF_ATM_FPGA, "155P-MF1 (FPGA)"){0x111a, 0x0000, ("155P-MF1 (FPGA)"), 0xff},

372

DEVICE( EF, EF_ATM_ASIC, "155P-MF1 (ASIC)"){0x111a, 0x0002, ("155P-MF1 (ASIC)"), 0xff},

373

DEVICE( FORE, FORE_PCA200PC, "PCA-200PC"){0x1127, 0x0210, ("PCA-200PC"), 0xff},

374

DEVICE( FORE, FORE_PCA200E, "PCA-200E"){0x1127, 0x0300, ("PCA-200E"), 0xff},

375

DEVICE( IMAGINGTECH, IMAGINGTECH_ICPCI, "MVC IC-PCI"){0x112f, 0x0000, ("MVC IC-PCI"), 0xff},

376

DEVICE( PHILIPS, PHILIPS_SAA7146,"SAA7146"){0x1131, 0x7146, ("SAA7146"), 0xff},

377

DEVICE( CYCLONE, CYCLONE_SDK, "SDK"){0x113c, 0x0001, ("SDK"), 0xff},

378

DEVICE( ALLIANCE, ALLIANCE_PROMOTIO, "Promotion-6410"){0x1142, 0x3210, ("Promotion-6410"), 0xff},

379

DEVICE( ALLIANCE, ALLIANCE_PROVIDEO, "Provideo"){0x1142, 0x6422, ("Provideo"), 0xff},

380

DEVICE( ALLIANCE, ALLIANCE_AT24, "AT24"){0x1142, 0x6424, ("AT24"), 0xff},

381

DEVICE( ALLIANCE, ALLIANCE_AT3D, "AT3D"){0x1142, 0x643d, ("AT3D"), 0xff},

382

DEVICE( VMIC, VMIC_VME, "VMIVME-7587"){0x114a, 0x7587, ("VMIVME-7587"), 0xff},

383

DEVICE( DIGI, DIGI_EPC, "AccelPort EPC"){0x114f, 0x0002, ("AccelPort EPC"), 0xff},

384

DEVICE( DIGI, DIGI_RIGHTSWITCH, "RightSwitch SE-6"){0x114f, 0x0003, ("RightSwitch SE-6"), 0xff},

385

DEVICE( DIGI, DIGI_XEM, "AccelPort Xem"){0x114f, 0x0004, ("AccelPort Xem"), 0xff},

386

DEVICE( DIGI, DIGI_XR, "AccelPort Xr"){0x114f, 0x0005, ("AccelPort Xr"), 0xff},

387

DEVICE( DIGI, DIGI_CX, "AccelPort C/X"){0x114f, 0x0006, ("AccelPort C/X"), 0xff},

388

DEVICE( DIGI, DIGI_XRJ, "AccelPort Xr/J"){0x114f, 0x0009, ("AccelPort Xr/J"), 0xff},

389

DEVICE( DIGI, DIGI_EPCJ, "AccelPort EPC/J"){0x114f, 0x000a, ("AccelPort EPC/J"), 0xff},

390

DEVICE( DIGI, DIGI_XR_920, "AccelPort Xr 920"){0x114f, 0x0027, ("AccelPort Xr 920"), 0xff},

391

DEVICE( MUTECH, MUTECH_MV1000, "MV-1000"){0x1159, 0x0001, ("MV-1000"), 0xff},

392

DEVICE( RENDITION, RENDITION_VERITE,"Verite 1000"){0x1163, 0x0001, ("Verite 1000"), 0xff},

393

DEVICE( RENDITION, RENDITION_VERITE2100,"Verite 2100"){0x1163, 0x2000, ("Verite 2100"), 0xff},

394

DEVICE( TOSHIBA, TOSHIBA_601, "Laptop"){0x1179, 0x0601, ("Laptop"), 0xff},

395

DEVICE( TOSHIBA, TOSHIBA_TOPIC95,"ToPIC95"){0x1179, 0x060a, ("ToPIC95"), 0xff},

396

DEVICE( TOSHIBA, TOSHIBA_TOPIC97,"ToPIC97"){0x1179, 0x060f, ("ToPIC97"), 0xff},

397

DEVICE( RICOH, RICOH_RL5C466, "RL5C466"){0x1180, 0x0466, ("RL5C466"), 0xff},

398

DEVICE( ARTOP, ARTOP_ATP850UF, "ATP850UF"){0x1191, 0x0005, ("ATP850UF"), 0xff},

399

DEVICE( ZEITNET, ZEITNET_1221, "1221"){0x1193, 0x0001, ("1221"), 0xff},

400

DEVICE( ZEITNET, ZEITNET_1225, "1225"){0x1193, 0x0002, ("1225"), 0xff},

401

DEVICE( OMEGA, OMEGA_82C092G, "82C092G"){0x119b, 0x1221, ("82C092G"), 0xff},

402

DEVICE( LITEON, LITEON_LNE100TX,"LNE100TX"){0x11ad, 0x0002, ("LNE100TX"), 0xff},

403

DEVICE( NP, NP_PCI_FDDI, "NP-PCI"){0x11bc, 0x0001, ("NP-PCI"), 0xff},

404

DEVICE( ATT, ATT_L56XMF, "L56xMF"){0x11c1, 0x0440, ("L56xMF"), 0xff},

405

DEVICE( SPECIALIX, SPECIALIX_IO8, "IO8+/PCI"){0x11cb, 0x2000, ("IO8+/PCI"), 0xff},

406

DEVICE( SPECIALIX, SPECIALIX_XIO, "XIO/SIO host"){0x11cb, 0x4000, ("XIO/SIO host"), 0xff},

407

DEVICE( SPECIALIX, SPECIALIX_RIO, "RIO host"){0x11cb, 0x8000, ("RIO host"), 0xff},

408

DEVICE( AURAVISION, AURAVISION_VXP524,"VXP524"){0x11d1, 0x01f7, ("VXP524"), 0xff},

409

DEVICE( IKON, IKON_10115, "10115 Greensheet"){0x11d5, 0x0115, ("10115 Greensheet"), 0xff},

410

DEVICE( IKON, IKON_10117, "10117 Greensheet"){0x11d5, 0x0117, ("10117 Greensheet"), 0xff},

411

DEVICE( ZORAN, ZORAN_36057, "ZR36057"){0x11de, 0x6057, ("ZR36057"), 0xff},

412

DEVICE( ZORAN, ZORAN_36120, "ZR36120"){0x11de, 0x6120, ("ZR36120"), 0xff},

413

DEVICE( KINETIC, KINETIC_2915, "2915 CAMAC"){0x11f4, 0x2915, ("2915 CAMAC"), 0xff},

414

DEVICE( COMPEX, COMPEX_ENET100VG4, "Readylink ENET100-VG4"){0x11f6, 0x0112, ("Readylink ENET100-VG4"), 0xff},

415

DEVICE( COMPEX, COMPEX_RL2000, "ReadyLink 2000"){0x11f6, 0x1401, ("ReadyLink 2000"), 0xff},

416

DEVICE( RP, RP8OCTA, "RocketPort 8 Oct"){0x11fe, 0x0001, ("RocketPort 8 Oct"), 0xff},

417

DEVICE( RP, RP8INTF, "RocketPort 8 Intf"){0x11fe, 0x0002, ("RocketPort 8 Intf"), 0xff},

418

DEVICE( RP, RP16INTF, "RocketPort 16 Intf"){0x11fe, 0x0003, ("RocketPort 16 Intf"), 0xff},

419

DEVICE( RP, RP32INTF, "RocketPort 32 Intf"){0x11fe, 0x0004, ("RocketPort 32 Intf"), 0xff},

420

DEVICE( CYCLADES, CYCLOM_Y_Lo, "Cyclom-Y below 1Mbyte"){0x120e, 0x0100, ("Cyclom-Y below 1Mbyte"), 0xff},

421

DEVICE( CYCLADES, CYCLOM_Y_Hi, "Cyclom-Y above 1Mbyte"){0x120e, 0x0101, ("Cyclom-Y above 1Mbyte"), 0xff},

422

DEVICE( CYCLADES, CYCLOM_Z_Lo, "Cyclom-Z below 1Mbyte"){0x120e, 0x0200, ("Cyclom-Z below 1Mbyte"), 0xff},

423

DEVICE( CYCLADES, CYCLOM_Z_Hi, "Cyclom-Z above 1Mbyte"){0x120e, 0x0201, ("Cyclom-Z above 1Mbyte"), 0xff},

424

DEVICE( ESSENTIAL, ESSENTIAL_ROADRUNNER,"Roadrunner serial HIPPI"){0x120f, 0x0001, ("Roadrunner serial HIPPI"), 0xff},

425

DEVICE( O2, O2_6832, "6832"){0x1217, 0x6832, ("6832"), 0xff},

426

DEVICE( 3DFX, 3DFX_VOODOO, "Voodoo"){0x121a, 0x0001, ("Voodoo"), 0xff},

427

DEVICE( 3DFX, 3DFX_VOODOO2, "Voodoo2"){0x121a, 0x0002, ("Voodoo2"), 0xff},

428

DEVICE( SIGMADES, SIGMADES_6425, "REALmagic64/GX"){0x1236, 0x6401, ("REALmagic64/GX"), 0xff},

429

DEVICE( STALLION, STALLION_ECHPCI832,"EasyConnection 8/32"){0x124d, 0x0000, ("EasyConnection 8/32"), 0xff},

430

DEVICE( STALLION, STALLION_ECHPCI864,"EasyConnection 8/64"){0x124d, 0x0002, ("EasyConnection 8/64"), 0xff},

431

DEVICE( STALLION, STALLION_EIOPCI,"EasyIO"){0x124d, 0x0003, ("EasyIO"), 0xff},

432

DEVICE( OPTIBASE, OPTIBASE_FORGE, "MPEG Forge"){0x1255, 0x1110, ("MPEG Forge"), 0xff},

433

DEVICE( OPTIBASE, OPTIBASE_FUSION,"MPEG Fusion"){0x1255, 0x1210, ("MPEG Fusion"), 0xff},

434

DEVICE( OPTIBASE, OPTIBASE_VPLEX, "VideoPlex"){0x1255, 0x2110, ("VideoPlex"), 0xff},

435

DEVICE( OPTIBASE, OPTIBASE_VPLEXCC,"VideoPlex CC"){0x1255, 0x2120, ("VideoPlex CC"), 0xff},

436

DEVICE( OPTIBASE, OPTIBASE_VQUEST,"VideoQuest"){0x1255, 0x2130, ("VideoQuest"), 0xff},

437

DEVICE( ASIX, ASIX_88140, "88140"){0x125b, 0x1400, ("88140"), 0xff},

438

DEVICE( SATSAGEM, SATSAGEM_PCR2101,"PCR2101 DVB receiver"){0x1267, 0x5352, ("PCR2101 DVB receiver"), 0xff},

439

DEVICE( SATSAGEM, SATSAGEM_TELSATTURBO,"Telsat Turbo DVB"){0x1267, 0x5a4b, ("Telsat Turbo DVB"), 0xff},

440

DEVICE( ENSONIQ, ENSONIQ_AUDIOPCI,"AudioPCI"){0x1274, 0x5000, ("AudioPCI"), 0xff},

441

DEVICE( PICTUREL, PICTUREL_PCIVST,"PCIVST"){0x12c5, 0x0081, ("PCIVST"), 0xff},

442

DEVICE( NVIDIA_SGS, NVIDIA_SGS_RIVA128, "Riva 128"){0x12d2, 0x0018, ("Riva 128"), 0xff},

443

DEVICE( CBOARDS, CBOARDS_DAS1602_16,"DAS1602/16"){0x1307, 0x0001, ("DAS1602/16"), 0xff},

444

DEVICE( SYMPHONY, SYMPHONY_101, "82C101"){0x1c1c, 0x0001, ("82C101"), 0xff},

445

DEVICE( TEKRAM, TEKRAM_DC290, "DC-290"){0x1de1, 0xdc29, ("DC-290"), 0xff},

446

DEVICE( 3DLABS, 3DLABS_300SX, "GLINT 300SX"){0x3d3d, 0x0001, ("GLINT 300SX"), 0xff},

447

DEVICE( 3DLABS, 3DLABS_500TX, "GLINT 500TX"){0x3d3d, 0x0002, ("GLINT 500TX"), 0xff},

448

DEVICE( 3DLABS, 3DLABS_DELTA, "GLINT Delta"){0x3d3d, 0x0003, ("GLINT Delta"), 0xff},

449

DEVICE( 3DLABS, 3DLABS_PERMEDIA,"PERMEDIA"){0x3d3d, 0x0004, ("PERMEDIA"), 0xff},

450

DEVICE( 3DLABS, 3DLABS_MX, "GLINT MX"){0x3d3d, 0x0006, ("GLINT MX"), 0xff},

451

DEVICE( AVANCE, AVANCE_ALG2064, "ALG2064i"){0x4005, 0x2064, ("ALG2064i"), 0xff},

452

DEVICE( AVANCE, AVANCE_2302, "ALG-2302"){0x4005, 0x2302, ("ALG-2302"), 0xff},

453

DEVICE( NETVIN, NETVIN_NV5000SC,"NV5000"){0x4a14, 0x5000, ("NV5000"), 0xff},

454

DEVICE( S3, S3_PLATO_PXS, "PLATO/PX (system)"){0x5333, 0x0551, ("PLATO/PX (system)"), 0xff},

455

DEVICE( S3, S3_ViRGE, "ViRGE"){0x5333, 0x5631, ("ViRGE"), 0xff},

456

DEVICE( S3, S3_TRIO, "Trio32/Trio64"){0x5333, 0x8811, ("Trio32/Trio64"), 0xff},

457

DEVICE( S3, S3_AURORA64VP, "Aurora64V+"){0x5333, 0x8812, ("Aurora64V+"), 0xff},

458

DEVICE( S3, S3_TRIO64UVP, "Trio64UV+"){0x5333, 0x8814, ("Trio64UV+"), 0xff},

459

DEVICE( S3, S3_ViRGE_VX, "ViRGE/VX"){0x5333, 0x883d, ("ViRGE/VX"), 0xff},

460

DEVICE( S3, S3_868, "Vision 868"){0x5333, 0x8880, ("Vision 868"), 0xff},

461

DEVICE( S3, S3_928, "Vision 928-P"){0x5333, 0x88b0, ("Vision 928-P"), 0xff},

462

DEVICE( S3, S3_864_1, "Vision 864-P"){0x5333, 0x88c0, ("Vision 864-P"), 0xff},

463

DEVICE( S3, S3_864_2, "Vision 864-P"){0x5333, 0x88c1, ("Vision 864-P"), 0xff},

464

DEVICE( S3, S3_964_1, "Vision 964-P"){0x5333, 0x88d0, ("Vision 964-P"), 0xff},

465

DEVICE( S3, S3_964_2, "Vision 964-P"){0x5333, 0x88d1, ("Vision 964-P"), 0xff},

466

DEVICE( S3, S3_968, "Vision 968"){0x5333, 0x88f0, ("Vision 968"), 0xff},

467

DEVICE( S3, S3_TRIO64V2, "Trio64V2/DX or /GX"){0x5333, 0x8901, ("Trio64V2/DX or /GX"), 0xff},

468

DEVICE( S3, S3_PLATO_PXG, "PLATO/PX (graphics)"){0x5333, 0x8902, ("PLATO/PX (graphics)"), 0xff},

469

DEVICE( S3, S3_ViRGE_DXGX, "ViRGE/DX or /GX"){0x5333, 0x8a01, ("ViRGE/DX or /GX"), 0xff},

470

DEVICE( S3, S3_ViRGE_GX2, "ViRGE/GX2"){0x5333, 0x8a10, ("ViRGE/GX2"), 0xff},

471

DEVICE( S3, S3_ViRGE_MX, "ViRGE/MX"){0x5333, 0x8c01, ("ViRGE/MX"), 0xff},

472

DEVICE( S3, S3_ViRGE_MXP, "ViRGE/MX+"){0x5333, 0x8c02, ("ViRGE/MX+"), 0xff},

473

DEVICE( S3, S3_ViRGE_MXPMV, "ViRGE/MX+MV"){0x5333, 0x8c03, ("ViRGE/MX+MV"), 0xff},

474

DEVICE( S3, S3_SONICVIBES, "SonicVibes"){0x5333, 0xca00, ("SonicVibes"), 0xff},

475

DEVICE( INTEL, INTEL_82375, "82375EB"){0x8086, 0x0482, ("82375EB"), 0xff},

476

BRIDGE( INTEL, INTEL_82424, "82424ZX Saturn", 0x00){0x8086, 0x0483, ("82424ZX Saturn"), (0x00)},

477

DEVICE( INTEL, INTEL_82378, "82378IB"){0x8086, 0x0484, ("82378IB"), 0xff},

478

DEVICE( INTEL, INTEL_82430, "82430ZX Aries"){0x8086, 0x0486, ("82430ZX Aries"), 0xff},

479

BRIDGE( INTEL, INTEL_82434, "82434LX Mercury/Neptune", 0x00){0x8086, 0x04a3, ("82434LX Mercury/Neptune"), (0x00)},

480

DEVICE( INTEL, INTEL_82092AA_0,"82092AA PCMCIA bridge"){0x8086, 0x1221, ("82092AA PCMCIA bridge"), 0xff},

481

DEVICE( INTEL, INTEL_82092AA_1,"82092AA EIDE"){0x8086, 0x1222, ("82092AA EIDE"), 0xff},

482

DEVICE( INTEL, INTEL_7116, "SAA7116"){0x8086, 0x1223, ("SAA7116"), 0xff},

483

DEVICE( INTEL, INTEL_82596, "82596"){0x8086, 0x1226, ("82596"), 0xff},

484

DEVICE( INTEL, INTEL_82865, "82865"){0x8086, 0x1227, ("82865"), 0xff},

485

DEVICE( INTEL, INTEL_82557, "82557"){0x8086, 0x1229, ("82557"), 0xff},

486

DEVICE( INTEL, INTEL_82437, "82437"){0x8086, 0x122d, ("82437"), 0xff},

487

DEVICE( INTEL, INTEL_82371_0, "82371 Triton PIIX"){0x8086, 0x122e, ("82371 Triton PIIX"), 0xff},

488

DEVICE( INTEL, INTEL_82371_1, "82371 Triton PIIX"){0x8086, 0x1230, ("82371 Triton PIIX"), 0xff},

489

DEVICE( INTEL, INTEL_82371MX, "430MX - 82371MX MPIIX"){0x8086, 0x1234, ("430MX - 82371MX MPIIX"), 0xff},

490

DEVICE( INTEL, INTEL_82437MX, "430MX - 82437MX MTSC"){0x8086, 0x1235, ("430MX - 82437MX MTSC"), 0xff},

491

DEVICE( INTEL, INTEL_82441, "82441FX Natoma"){0x8086, 0x1237, ("82441FX Natoma"), 0xff},

492

DEVICE( INTEL, INTEL_82380FB, "82380FB Mobile"){0x8086, 0x124b, ("82380FB Mobile"), 0xff},

493

DEVICE( INTEL, INTEL_82439, "82439HX Triton II"){0x8086, 0x1250, ("82439HX Triton II"), 0xff},

494

DEVICE( INTEL, INTEL_82371SB_0,"82371SB PIIX3 ISA"){0x8086, 0x7000, ("82371SB PIIX3 ISA"), 0xff},

495

DEVICE( INTEL, INTEL_82371SB_1,"82371SB PIIX3 IDE"){0x8086, 0x7010, ("82371SB PIIX3 IDE"), 0xff},

496

DEVICE( INTEL, INTEL_82371SB_2,"82371SB PIIX3 USB"){0x8086, 0x7020, ("82371SB PIIX3 USB"), 0xff},

497

DEVICE( INTEL, INTEL_82437VX, "82437VX Triton II"){0x8086, 0x7030, ("82437VX Triton II"), 0xff},

498

DEVICE( INTEL, INTEL_82439TX, "82439TX"){0x8086, 0x7100, ("82439TX"), 0xff},

499

DEVICE( INTEL, INTEL_82371AB_0,"82371AB PIIX4 ISA"){0x8086, 0x7110, ("82371AB PIIX4 ISA"), 0xff},

500

DEVICE( INTEL, INTEL_82371AB, "82371AB PIIX4 IDE"){0x8086, 0x7111, ("82371AB PIIX4 IDE"), 0xff},

501

DEVICE( INTEL, INTEL_82371AB_2,"82371AB PIIX4 USB"){0x8086, 0x7112, ("82371AB PIIX4 USB"), 0xff},

502

DEVICE( INTEL, INTEL_82371AB_3,"82371AB PIIX4 ACPI"){0x8086, 0x7113, ("82371AB PIIX4 ACPI"), 0xff},

503

DEVICE( INTEL, INTEL_82443LX_0,"440LX - 82443LX PAC Host"){0x8086, 0x7180, ("440LX - 82443LX PAC Host"), 0xff},

504

DEVICE( INTEL, INTEL_82443LX_1,"440LX - 82443LX PAC AGP"){0x8086, 0x7181, ("440LX - 82443LX PAC AGP"), 0xff},

505

DEVICE( INTEL, INTEL_82443BX_0,"440BX - 82443BX Host"){0x8086, 0x7190, ("440BX - 82443BX Host"), 0xff},

506

DEVICE( INTEL, INTEL_82443BX_1,"440BX - 82443BX AGP"){0x8086, 0x7191, ("440BX - 82443BX AGP"), 0xff},

507

DEVICE( INTEL, INTEL_82443BX_2,"440BX - 82443BX Host (no AGP)"){0x8086, 0x7192, ("440BX - 82443BX Host (no AGP)"), 0xff},

508

DEVICE( INTEL, INTEL_82443GX_0,"440GX - 82443GX Host"){0x8086, 0x71A0, ("440GX - 82443GX Host"), 0xff},

509

DEVICE( INTEL, INTEL_82443GX_1,"440GX - 82443GX AGP"){0x8086, 0x71A1, ("440GX - 82443GX AGP"), 0xff},

510

DEVICE( INTEL, INTEL_82443GX_2,"440GX - 82443GX Host (no AGP)"){0x8086, 0x71A2, ("440GX - 82443GX Host (no AGP)"), 0xff},

511

DEVICE( INTEL, INTEL_P6, "Orion P6"){0x8086, 0x84c4, ("Orion P6"), 0xff},

512

DEVICE( INTEL, INTEL_82450GX, "82450GX Orion P6"){0x8086, 0x84c5, ("82450GX Orion P6"), 0xff},

513

DEVICE( KTI, KTI_ET32P2, "ET32P2"){0x8e2e, 0x3000, ("ET32P2"), 0xff},

514

DEVICE( ADAPTEC, ADAPTEC_7810, "AIC-7810 RAID"){0x9004, 0x1078, ("AIC-7810 RAID"), 0xff},

515

DEVICE( ADAPTEC, ADAPTEC_7850, "AIC-7850"){0x9004, 0x5078, ("AIC-7850"), 0xff},

516

DEVICE( ADAPTEC, ADAPTEC_7855, "AIC-7855"){0x9004, 0x5578, ("AIC-7855"), 0xff},

517

DEVICE( ADAPTEC, ADAPTEC_5800, "AIC-5800"){0x9004, 0x5800, ("AIC-5800"), 0xff},

518

DEVICE( ADAPTEC, ADAPTEC_7860, "AIC-7860"){0x9004, 0x6078, ("AIC-7860"), 0xff},

519

DEVICE( ADAPTEC, ADAPTEC_7861, "AIC-7861"){0x9004, 0x6178, ("AIC-7861"), 0xff},

520

DEVICE( ADAPTEC, ADAPTEC_7870, "AIC-7870"){0x9004, 0x7078, ("AIC-7870"), 0xff},

521

DEVICE( ADAPTEC, ADAPTEC_7871, "AIC-7871"){0x9004, 0x7178, ("AIC-7871"), 0xff},

522

DEVICE( ADAPTEC, ADAPTEC_7872, "AIC-7872"){0x9004, 0x7278, ("AIC-7872"), 0xff},

523

DEVICE( ADAPTEC, ADAPTEC_7873, "AIC-7873"){0x9004, 0x7378, ("AIC-7873"), 0xff},

524

DEVICE( ADAPTEC, ADAPTEC_7874, "AIC-7874"){0x9004, 0x7478, ("AIC-7874"), 0xff},

525

DEVICE( ADAPTEC, ADAPTEC_7895, "AIC-7895U"){0x9004, 0x7895, ("AIC-7895U"), 0xff},

526

DEVICE( ADAPTEC, ADAPTEC_7880, "AIC-7880U"){0x9004, 0x8078, ("AIC-7880U"), 0xff},

527

DEVICE( ADAPTEC, ADAPTEC_7881, "AIC-7881U"){0x9004, 0x8178, ("AIC-7881U"), 0xff},

528

DEVICE( ADAPTEC, ADAPTEC_7882, "AIC-7882U"){0x9004, 0x8278, ("AIC-7882U"), 0xff},

529

DEVICE( ADAPTEC, ADAPTEC_7883, "AIC-7883U"){0x9004, 0x8378, ("AIC-7883U"), 0xff},

530

DEVICE( ADAPTEC, ADAPTEC_7884, "AIC-7884U"){0x9004, 0x8478, ("AIC-7884U"), 0xff},

531

DEVICE( ADAPTEC, ADAPTEC_1030, "ABA-1030 DVB receiver"){0x9004, 0x8b78, ("ABA-1030 DVB receiver"), 0xff},

532

DEVICE( ADAPTEC2, ADAPTEC2_2940U2, "AHA-2940U2"){0x9005, 0x0010, ("AHA-2940U2"), 0xff},

533

DEVICE( ADAPTEC2, ADAPTEC2_7890, "AIC-7890/1"){0x9005, 0x001f, ("AIC-7890/1"), 0xff},

534

DEVICE( ADAPTEC2, ADAPTEC2_3940U2, "AHA-3940U2"){0x9005, 0x0050, ("AHA-3940U2"), 0xff},

535

DEVICE( ADAPTEC2, ADAPTEC2_7896, "AIC-7896/7"){0x9005, 0x005f, ("AIC-7896/7"), 0xff},

536

DEVICE( ATRONICS, ATRONICS_2015, "IDE-2015PL"){0x907f, 0x2015, ("IDE-2015PL"), 0xff},

537

DEVICE( TIGERJET, TIGERJET_300, "Tiger300 ISDN"){0xe159, 0x0001, ("Tiger300 ISDN"), 0xff},

538

DEVICE( ARK, ARK_STING, "Stingray"){0xedd8, 0xa091, ("Stingray"), 0xff},

539

DEVICE( ARK, ARK_STINGARK, "Stingray ARK 2000PV"){0xedd8, 0xa099, ("Stingray ARK 2000PV"), 0xff},

540

DEVICE( ARK, ARK_2000MT, "2000MT"){0xedd8, 0xa0a1, ("2000MT"), 0xff}

541

};

542

543

544

#ifdef CONFIG_PCI_OPTIMIZE1

545

546

547

* An item of this structure has the following meaning:

548

* for each optimization, the register address, the mask

549

* and value to write to turn it on.

550

* There are 5 optimizations for the moment:

551

* Cache L2 write back best than write through

552

* Posted Write for CPU to PCI enable

553

* Posted Write for CPU to MEMORY enable

554

* Posted Write for PCI to MEMORY enable

555

* PCI Burst enable

556

557

* Half of the bios I've meet don't allow you to turn that on, and you

558

* can gain more than 15% on graphic accesses using those

559

* optimizations...

560

561

struct optimization_type {

562

const char *type;

563

const char *off;

564

const char *on;

565

} bridge_optimization[] = {

566

{"Cache L2", "write through", "write back"},

567

{"CPU-PCI posted write", "off", "on"},

568

{"CPU-Memory posted write", "off", "on"},

569

{"PCI-Memory posted write", "off", "on"},

570

{"PCI burst", "off", "on"}

571

};

572

573

#define NUM_OPTIMIZATIONS(sizeof(bridge_optimization) / sizeof(bridge_optimization[0])
) \

574

(sizeof(bridge_optimization) / sizeof(bridge_optimization[0]))

575

576

struct bridge_mapping_type {

577

unsigned char addr; /* config space address */

578

unsigned char mask;

579

unsigned char value;

580

} bridge_mapping[] = {

581

582

* Intel Neptune/Mercury/Saturn:

583

* If the internal cache is write back,

584

* the L2 cache must be write through!

585

* I've to check out how to control that

586

* for the moment, we won't touch the cache

587

588

{0x0 ,0x02 ,0x02 },

589

{0x53 ,0x02 ,0x02 },

590

{0x53 ,0x01 ,0x01 },

591

{0x54 ,0x01 ,0x01 },

592

{0x54 ,0x02 ,0x02 },

593

594

595

* UMC 8891A Pentium chipset:

596

* Why did you think UMC was cheaper ??

597

598

{0x50 ,0x10 ,0x00 },

599

{0x51 ,0x40 ,0x40 },

600

{0x0 ,0x0 ,0x0 },

601

{0x0 ,0x0 ,0x0 },

602

{0x0 ,0x0 ,0x0 },

603

604

605

* UMC UM8881F

606

* This is a dummy entry for my tests.

607

* I have this chipset and no docs....

608

609

{0x0 ,0x1 ,0x1 },

610

{0x0 ,0x2 ,0x0 },

611

{0x0 ,0x0 ,0x0 },

612

{0x0 ,0x0 ,0x0 },

613

{0x0 ,0x0 ,0x0 }

614

};

615

616

#endif /* CONFIG_PCI_OPTIMIZE */

617

618

619

620

* device_info[] is sorted so we can use binary search

621

622

struct pci_dev_info *pci_lookup_dev(unsigned int vendor, unsigned int dev)

623

{

624

int min = 0,

625

max = sizeof(dev_info)/sizeof(dev_info[0]) - 1;

626

627

for ( ; ; )

628

{

629

int i = (min + max) >> 1;

630

long order;

631

632

order = dev_info[i].vendor - (long) vendor;

633

if (!order)

634

order = dev_info[i].device - (long) dev;

635

636

if (order < 0)

637

{

638

min = i + 1;

639

if ( min > max )

640

return 0;

641

continue;

642

}

643

644

if (order > 0)

645

{

646

max = i - 1;

647

if ( min > max )

648

return 0;

649

continue;

650

}

651

652

return & dev_info[ i ];

653

}

654

}

655

656

const char *pci_strclass (unsigned int class)

657

{

658

switch (class >> 8) {

659

case PCI_CLASS_NOT_DEFINED0x0000: return "Non-VGA device";

660

case PCI_CLASS_NOT_DEFINED_VGA0x0001: return "VGA compatible device";

661

662

case PCI_CLASS_STORAGE_SCSI0x0100: return "SCSI storage controller";

663

case PCI_CLASS_STORAGE_IDE0x0101: return "IDE interface";

664

case PCI_CLASS_STORAGE_FLOPPY0x0102: return "Floppy disk controller";

665

case PCI_CLASS_STORAGE_IPI0x0103: return "IPI bus controller";

666

case PCI_CLASS_STORAGE_RAID0x0104: return "RAID bus controller";

667

case PCI_CLASS_STORAGE_OTHER0x0180: return "Unknown mass storage controller";

668

669

case PCI_CLASS_NETWORK_ETHERNET0x0200: return "Ethernet controller";

670

case PCI_CLASS_NETWORK_TOKEN_RING0x0201: return "Token ring network controller";

671

case PCI_CLASS_NETWORK_FDDI0x0202: return "FDDI network controller";

672

case PCI_CLASS_NETWORK_ATM0x0203: return "ATM network controller";

673

case PCI_CLASS_NETWORK_OTHER0x0280: return "Network controller";

674

675

case PCI_CLASS_DISPLAY_VGA0x0300: return "VGA compatible controller";

676

case PCI_CLASS_DISPLAY_XGA0x0301: return "XGA compatible controller";

677

case PCI_CLASS_DISPLAY_OTHER0x0380: return "Display controller";

678

679

case PCI_CLASS_MULTIMEDIA_VIDEO0x0400: return "Multimedia video controller";

680

case PCI_CLASS_MULTIMEDIA_AUDIO0x0401: return "Multimedia audio controller";

681

case PCI_CLASS_MULTIMEDIA_OTHER0x0480: return "Multimedia controller";

682

683

case PCI_CLASS_MEMORY_RAM0x0500: return "RAM memory";

684

case PCI_CLASS_MEMORY_FLASH0x0501: return "FLASH memory";

685

case PCI_CLASS_MEMORY_OTHER0x0580: return "Memory";

686

687

case PCI_CLASS_BRIDGE_HOST0x0600: return "Host bridge";

688

case PCI_CLASS_BRIDGE_ISA0x0601: return "ISA bridge";

689

case PCI_CLASS_BRIDGE_EISA0x0602: return "EISA bridge";

690

case PCI_CLASS_BRIDGE_MC0x0603: return "MicroChannel bridge";

691

case PCI_CLASS_BRIDGE_PCI0x0604: return "PCI bridge";

692

case PCI_CLASS_BRIDGE_PCMCIA0x0605: return "PCMCIA bridge";

693

case PCI_CLASS_BRIDGE_NUBUS0x0606: return "NuBus bridge";

694

case PCI_CLASS_BRIDGE_CARDBUS0x0607: return "CardBus bridge";

695

case PCI_CLASS_BRIDGE_OTHER0x0680: return "Bridge";

696

697

case PCI_CLASS_COMMUNICATION_SERIAL0x0700: return "Serial controller";

698

case PCI_CLASS_COMMUNICATION_PARALLEL0x0701: return "Parallel controller";

699

case PCI_CLASS_COMMUNICATION_OTHER0x0780: return "Communication controller";

700

701

case PCI_CLASS_SYSTEM_PIC0x0800: return "PIC";

702

case PCI_CLASS_SYSTEM_DMA0x0801: return "DMA controller";

703

case PCI_CLASS_SYSTEM_TIMER0x0802: return "Timer";

704

case PCI_CLASS_SYSTEM_RTC0x0803: return "RTC";

705

case PCI_CLASS_SYSTEM_OTHER0x0880: return "System peripheral";

706

707

case PCI_CLASS_INPUT_KEYBOARD0x0900: return "Keyboard controller";

708

case PCI_CLASS_INPUT_PEN0x0901: return "Digitizer Pen";

709

case PCI_CLASS_INPUT_MOUSE0x0902: return "Mouse controller";

710

case PCI_CLASS_INPUT_OTHER0x0980: return "Input device controller";

711

712

case PCI_CLASS_DOCKING_GENERIC0x0a00: return "Generic Docking Station";

713

case PCI_CLASS_DOCKING_OTHER0x0a01: return "Docking Station";

714

715

case PCI_CLASS_PROCESSOR_3860x0b00: return "386";

716

case PCI_CLASS_PROCESSOR_4860x0b01: return "486";

717

case PCI_CLASS_PROCESSOR_PENTIUM0x0b02: return "Pentium";

718

case PCI_CLASS_PROCESSOR_ALPHA0x0b10: return "Alpha";

719

case PCI_CLASS_PROCESSOR_POWERPC0x0b20: return "Power PC";

720

case PCI_CLASS_PROCESSOR_CO0x0b40: return "Co-processor";

721

722

case PCI_CLASS_SERIAL_FIREWIRE0x0c00: return "FireWire (IEEE 1394)";

723

case PCI_CLASS_SERIAL_ACCESS0x0c01: return "ACCESS Bus";

724

case PCI_CLASS_SERIAL_SSA0x0c02: return "SSA";

725

case PCI_CLASS_SERIAL_USB0x0c03: return "USB Controller";

726

case PCI_CLASS_SERIAL_FIBER0x0c04: return "Fiber Channel";

727

728

default: return "Unknown class";

729

}

730

}

731

732

733

const char *pci_strvendor(unsigned int vendor)

734

{

735

switch (vendor) {

736

case PCI_VENDOR_ID_COMPAQ0x0e11: return "Compaq";

737

case PCI_VENDOR_ID_NCR0x1000: return "NCR";

738

case PCI_VENDOR_ID_ATI0x1002: return "ATI";

739

case PCI_VENDOR_ID_VLSI0x1004: return "VLSI";

740

case PCI_VENDOR_ID_ADL0x1005: return "Advance Logic";

741

case PCI_VENDOR_ID_NS0x100b: return "NS";

742

case PCI_VENDOR_ID_TSENG0x100c: return "Tseng'Lab";

743

case PCI_VENDOR_ID_WEITEK0x100e: return "Weitek";

744

case PCI_VENDOR_ID_DEC0x1011: return "DEC";

745

case PCI_VENDOR_ID_CIRRUS0x1013: return "Cirrus Logic";

746

case PCI_VENDOR_ID_IBM0x1014: return "IBM";

747

case PCI_VENDOR_ID_WD0x101c: return "Western Digital";

748

case PCI_VENDOR_ID_AMD0x1022: return "AMD";

749

case PCI_VENDOR_ID_TRIDENT0x1023: return "Trident";

750

case PCI_VENDOR_ID_AI0x1025: return "Acer Incorporated";

751

case PCI_VENDOR_ID_MATROX0x102B: return "Matrox";

752

case PCI_VENDOR_ID_CT0x102c: return "Chips & Technologies";

753

case PCI_VENDOR_ID_MIRO0x1031: return "Miro";

754

case PCI_VENDOR_ID_NEC0x1033: return "NEC";

755

case PCI_VENDOR_ID_FD0x1036: return "Future Domain";

756

case PCI_VENDOR_ID_SI0x1039: return "Silicon Integrated Systems";

757

case PCI_VENDOR_ID_HP0x103c: return "Hewlett Packard";

758

case PCI_VENDOR_ID_PCTECH0x1042: return "PCTECH";

759

case PCI_VENDOR_ID_DPT0x1044: return "DPT";

760

case PCI_VENDOR_ID_OPTI0x1045: return "OPTi";

761

case PCI_VENDOR_ID_SGS0x104a: return "SGS Thomson";

762

case PCI_VENDOR_ID_BUSLOGIC0x104B: return "BusLogic";

763

case PCI_VENDOR_ID_TI0x104c: return "Texas Instruments";

764

case PCI_VENDOR_ID_OAK0x104e: return "OAK";

765

case PCI_VENDOR_ID_WINBOND20x1050: return "Winbond";

766

case PCI_VENDOR_ID_MOTOROLA0x1057: return "Motorola";

767

case PCI_VENDOR_ID_PROMISE0x105a: return "Promise Technology";

768

case PCI_VENDOR_ID_APPLE0x106b: return "Apple";

769

case PCI_VENDOR_ID_N90x105d: return "Number Nine";

770

case PCI_VENDOR_ID_UMC0x1060: return "UMC";

771

case PCI_VENDOR_ID_X0x1061: return "X TECHNOLOGY";

772

case PCI_VENDOR_ID_NEXGEN0x1074: return "Nexgen";

773

case PCI_VENDOR_ID_QLOGIC0x1077: return "Q Logic";

774

case PCI_VENDOR_ID_LEADTEK0x107d: return "Leadtek Research";

775

case PCI_VENDOR_ID_CONTAQ0x1080: return "Contaq";

776

case PCI_VENDOR_ID_FOREX0x1083: return "Forex";

777

case PCI_VENDOR_ID_OLICOM0x108d: return "Olicom";

778

case PCI_VENDOR_ID_CMD0x1095: return "CMD";

779

case PCI_VENDOR_ID_VISION0x1098: return "Vision";

780

case PCI_VENDOR_ID_BROOKTREE0x109e: return "Brooktree";

781

case PCI_VENDOR_ID_SIERRA0x10a8: return "Sierra";

782

case PCI_VENDOR_ID_ACC0x10aa: return "ACC MICROELECTRONICS";

783

case PCI_VENDOR_ID_WINBOND0x10ad: return "Winbond";

784

case PCI_VENDOR_ID_DATABOOK0x10b3: return "Databook";

785

case PCI_VENDOR_ID_3COM0x10b7: return "3Com";

786

case PCI_VENDOR_ID_SMC0x10b8: return "SMC";

787

case PCI_VENDOR_ID_AL0x10b9: return "Acer Labs";

788

case PCI_VENDOR_ID_MITSUBISHI0x10ba: return "Mitsubishi";

789

case PCI_VENDOR_ID_NEOMAGIC0x10c8: return "Neomagic";

790

case PCI_VENDOR_ID_ASP0x10cd: return "Advanced System Products";

791

case PCI_VENDOR_ID_CERN0x10dc: return "CERN";

792

case PCI_VENDOR_ID_IMS0x10e0: return "IMS";

793

case PCI_VENDOR_ID_TEKRAM20x10e1: return "Tekram";

794

case PCI_VENDOR_ID_TUNDRA0x10e3: return "Tundra";

795

case PCI_VENDOR_ID_AMCC0x10e8: return "AMCC";

796

case PCI_VENDOR_ID_INTERG0x10ea: return "Intergraphics";

797

case PCI_VENDOR_ID_REALTEK0x10ec: return "Realtek";

798

case PCI_VENDOR_ID_TRUEVISION0x10fa: return "Truevision";

799

case PCI_VENDOR_ID_INIT0x1101: return "Initio Corp";

800

case PCI_VENDOR_ID_VIA0x1106: return "VIA Technologies";

801

case PCI_VENDOR_ID_VORTEX0x1119: return "VORTEX";

802

case PCI_VENDOR_ID_EF0x111a: return "Efficient Networks";

803

case PCI_VENDOR_ID_FORE0x1127: return "Fore Systems";

804

case PCI_VENDOR_ID_IMAGINGTECH0x112f: return "Imaging Technology";

805

case PCI_VENDOR_ID_PHILIPS0x1131: return "Philips";

806

case PCI_VENDOR_ID_PLX0x10b5: return "PLX";

807

case PCI_VENDOR_ID_ALLIANCE0x1142: return "Alliance";

808

case PCI_VENDOR_ID_VMIC0x114a: return "VMIC";

809

case PCI_VENDOR_ID_DIGI0x114f: return "Digi Intl.";

810

case PCI_VENDOR_ID_MUTECH0x1159: return "Mutech";

811

case PCI_VENDOR_ID_RENDITION0x1163: return "Rendition";

812

case PCI_VENDOR_ID_TOSHIBA0x1179: return "Toshiba";

813

case PCI_VENDOR_ID_RICOH0x1180: return "Ricoh";

814

case PCI_VENDOR_ID_ZEITNET0x1193: return "ZeitNet";

815

case PCI_VENDOR_ID_OMEGA0x119b: return "Omega Micro";

816

case PCI_VENDOR_ID_NP0x11bc: return "Network Peripherals";

817

case PCI_VENDOR_ID_SPECIALIX0x11cb: return "Specialix";

818

case PCI_VENDOR_ID_IKON0x11d5: return "Ikon";

819

case PCI_VENDOR_ID_ZORAN0x11de: return "Zoran";

820

case PCI_VENDOR_ID_COMPEX0x11f6: return "Compex";

821

case PCI_VENDOR_ID_RP0x11fe: return "Comtrol";

822

case PCI_VENDOR_ID_CYCLADES0x120e: return "Cyclades";

823

case PCI_VENDOR_ID_3DFX0x121a: return "3Dfx";

824

case PCI_VENDOR_ID_SIGMADES0x1236: return "Sigma Designs";

825

case PCI_VENDOR_ID_OPTIBASE0x1255: return "Optibase";

826

case PCI_VENDOR_ID_NVIDIA_SGS0x12d2: return "NVidia/SGS Thomson";

827

case PCI_VENDOR_ID_ENSONIQ0x1274: return "Ensoniq";

828

case PCI_VENDOR_ID_SYMPHONY0x1c1c: return "Symphony";

829

case PCI_VENDOR_ID_TEKRAM0x1de1: return "Tekram";

830

case PCI_VENDOR_ID_3DLABS0x3d3d: return "3Dlabs";

831

case PCI_VENDOR_ID_AVANCE0x4005: return "Avance";

832

case PCI_VENDOR_ID_NETVIN0x4a14: return "NetVin";

833

case PCI_VENDOR_ID_S30x5333: return "S3 Inc.";

834

case PCI_VENDOR_ID_INTEL0x8086: return "Intel";

835

case PCI_VENDOR_ID_KTI0x8e2e: return "KTI";

836

case PCI_VENDOR_ID_ADAPTEC0x9004: return "Adaptec";

837

case PCI_VENDOR_ID_ADAPTEC20x9005: return "Adaptec";

838

case PCI_VENDOR_ID_ATRONICS0x907f: return "Atronics";

839

case PCI_VENDOR_ID_ARK0xedd8: return "ARK Logic";

840

case PCI_VENDOR_ID_ASIX0x125b: return "ASIX";

841

case PCI_VENDOR_ID_LITEON0x11ad: return "Lite-on";

842

default: return "Unknown vendor";

843

}

844

}

845

846

847

const char *pci_strdev(unsigned int vendor, unsigned int device)

848

{

849

struct pci_dev_info *info;

850

851

info = pci_lookup_dev(vendor, device);

852

return info ? info->name : "Unknown device";

853

}

854

855

856

857

858

* Turn on/off PCI bridge optimization. This should allow benchmarking.

859

860

static void burst_bridge(unsigned char bus, unsigned char devfn,

861

unsigned char pos, int turn_on)

862

{

863

#ifdef CONFIG_PCI_OPTIMIZE1

864

struct bridge_mapping_type *bmap;

865

unsigned char val;

866

int i;

867

868

pos *= NUM_OPTIMIZATIONS(sizeof(bridge_optimization) / sizeof(bridge_optimization[0])
);

869

printk("PCI bridge optimization.\n");

870

for (i = 0; i < NUM_OPTIMIZATIONS(sizeof(bridge_optimization) / sizeof(bridge_optimization[0])
); i++) {

871

printk(" %s: ", bridge_optimization[i].type);

872

bmap = &bridge_mapping[pos + i];

873

if (!bmap->addr) {

874

printk("Not supported.");

875

} else {

876

pcibios_read_config_byte(bus, devfn, bmap->addr, &val);

877

if ((val & bmap->mask) == bmap->value) {

878

printk("%s.", bridge_optimization[i].on);

879

if (!turn_on) {

880

pcibios_write_config_byte(bus, devfn,

881

bmap->addr,

882

(val | bmap->mask)

883

- bmap->value);

884

printk("Changed! Now %s.", bridge_optimization[i].off);

885

}

886

} else {

887

printk("%s.", bridge_optimization[i].off);

888

if (turn_on) {

889

pcibios_write_config_byte(bus, devfn,

890

bmap->addr,

891

(val & (0xff - bmap->mask))

892

+ bmap->value);

893

printk("Changed! Now %s.", bridge_optimization[i].on);

894

}

895

}

896

}

897

printk("\n");

898

}

899

#endif /* CONFIG_PCI_OPTIMIZE */

900

}

901

902

903

904

* Convert some of the configuration space registers of the device at

905

* address (bus,devfn) into a string (possibly several lines each).

906

* The configuration string is stored starting at buf[len]. If the

907

* string would exceed the size of the buffer (SIZE), 0 is returned.

908

909

static int sprint_dev_config(struct pci_dev *dev, char *buf, int size)

910

{

911

unsigned long base;

912

unsigned int l, class_rev, bus, devfn, last_reg;

913

unsigned short vendor, device, status;

914

unsigned char bist, latency, min_gnt, max_lat, hdr_type;

915

int reg, len = 0;

916

const char *str;

917

918

bus = dev->bus->number;

919

devfn = dev->devfn;

920

921

pcibios_read_config_byte (bus, devfn, PCI_HEADER_TYPE0x0e, &hdr_type);

922

pcibios_read_config_dword(bus, devfn, PCI_CLASS_REVISION0x08, &class_rev);

923

pcibios_read_config_word (bus, devfn, PCI_VENDOR_ID0x00, &vendor);

924

pcibios_read_config_word (bus, devfn, PCI_DEVICE_ID0x02, &device);

925

pcibios_read_config_word (bus, devfn, PCI_STATUS0x06, &status);

926

pcibios_read_config_byte (bus, devfn, PCI_BIST0x0f, &bist);

927

pcibios_read_config_byte (bus, devfn, PCI_LATENCY_TIMER0x0d, &latency);

928

pcibios_read_config_byte (bus, devfn, PCI_MIN_GNT0x3e, &min_gnt);

929

pcibios_read_config_byte (bus, devfn, PCI_MAX_LAT0x3f, &max_lat);

930

if (len + 80 > size) {

←

Taking false branch

→

931

return -1;

932

}

933

len += sprintflinux_sprintf(buf + len, " Bus %2d, device %3d, function %2d:\n",

934

bus, PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f), PCI_FUNC(devfn)((devfn) & 0x07));

935

936

if (len + 80 > size) {

←

Taking false branch

→

937

return -1;

938

}

939

len += sprintflinux_sprintf(buf + len, " %s: %s %s (rev %d).\n ",

940

pci_strclass(class_rev >> 8), pci_strvendor(vendor),

941

pci_strdev(vendor, device), class_rev & 0xff);

942

943

if (!pci_lookup_dev(vendor, device)) {

←

Taking false branch

→

944

len += sprintflinux_sprintf(buf + len,

945

"Vendor id=%x. Device id=%x.\n ",

946

vendor, device);

947

}

948

949

str = 0; /* to keep gcc shut... */

←

Null pointer value stored to 'str'

→

950

switch (status & PCI_STATUS_DEVSEL_MASK0x600) {

←

'Default' branch taken. Execution continues on line 955

→

951

case PCI_STATUS_DEVSEL_FAST0x000: str = "Fast devsel. "; break;

952

case PCI_STATUS_DEVSEL_MEDIUM0x200: str = "Medium devsel. "; break;

953

case PCI_STATUS_DEVSEL_SLOW0x400: str = "Slow devsel. "; break;

954

}

955

if (len + strlen(str) > size) {

←

Null pointer argument in call to string length function

956

return -1;

957

}

958

len += sprintflinux_sprintf(buf + len, str);

959

960

if (status & PCI_STATUS_FAST_BACK0x80) {

961

# define fast_b2b_capable "Fast back-to-back capable. "

962

if (len + strlen(fast_b2b_capable) > size) {

963

return -1;

964

}

965

len += sprintflinux_sprintf(buf + len, fast_b2b_capable);

966

# undef fast_b2b_capable

967

}

968

969

if (bist & PCI_BIST_CAPABLE0x80) {

970

# define BIST_capable "BIST capable. "

971

if (len + strlen(BIST_capable) > size) {

972

return -1;

973

}

974

len += sprintflinux_sprintf(buf + len, BIST_capable);

975

# undef BIST_capable

976

}

977

978

if (dev->irq) {

979

if (len + 40 > size) {

980

return -1;

981

}

982

len += sprintflinux_sprintf(buf + len, "IRQ %d. ", dev->irq);

983

}

984

985

if (dev->master) {

986

if (len + 80 > size) {

987

return -1;

988

}

989

len += sprintflinux_sprintf(buf + len, "Master Capable. ");

990

if (latency)

991

len += sprintflinux_sprintf(buf + len, "Latency=%d. ", latency);

992

else

993

len += sprintflinux_sprintf(buf + len, "No bursts. ");

994

if (min_gnt)

995

len += sprintflinux_sprintf(buf + len, "Min Gnt=%d.", min_gnt);

996

if (max_lat)

997

len += sprintflinux_sprintf(buf + len, "Max Lat=%d.", max_lat);

998

}

999

1000

switch (hdr_type & 0x7f) {

1001

case 0:

1002

last_reg = PCI_BASE_ADDRESS_50x24;

1003

break;

1004

case 1:

1005

last_reg = PCI_BASE_ADDRESS_10x14;

1006

break;

1007

default:

1008

last_reg = 0;

1009

}

1010

for (reg = PCI_BASE_ADDRESS_00x10; reg <= last_reg; reg += 4) {

1011

if (len + 40 > size) {

1012

return -1;

1013

}

1014

pcibios_read_config_dword(bus, devfn, reg, &l);

1015

base = l;

1016

if (!base) {

1017

continue;

1018

}

1019

1020

if (base & PCI_BASE_ADDRESS_SPACE_IO0x01) {

1021

len += sprintflinux_sprintf(buf + len,

1022

"\n I/O at 0x%lx.",

1023

base & PCI_BASE_ADDRESS_IO_MASK(~0x03));

1024

} else {

1025

const char *pref, *type = "unknown";

1026

1027

if (base & PCI_BASE_ADDRESS_MEM_PREFETCH0x08) {

1028

pref = "P";

1029

} else {

1030

pref = "Non-p";

1031

}

1032

switch (base & PCI_BASE_ADDRESS_MEM_TYPE_MASK0x06) {

1033

case PCI_BASE_ADDRESS_MEM_TYPE_320x00:

1034

type = "32 bit"; break;

1035

case PCI_BASE_ADDRESS_MEM_TYPE_1M0x02:

1036

type = "20 bit"; break;

1037

case PCI_BASE_ADDRESS_MEM_TYPE_640x04:

1038

type = "64 bit";

1039

/* read top 32 bit address of base addr: */

1040

reg += 4;

1041

pcibios_read_config_dword(bus, devfn, reg, &l);

1042

base |= ((u64) l) << 32;

1043

break;

1044

}

1045

len += sprintflinux_sprintf(buf + len,

1046

"\n %srefetchable %s memory at "

1047

"0x%lx.", pref, type,

1048

base & PCI_BASE_ADDRESS_MEM_MASK(~0x0f));

1049

}

1050

}

1051

1052

len += sprintflinux_sprintf(buf + len, "\n");

1053

return len;

1054

}

1055

1056

1057

1058

* Return list of PCI devices as a character string for /proc/pci.

1059

* BUF is a buffer that is PAGE_SIZE bytes long.

1060

1061

int get_pci_list(char *buf)

1062

{

1063

int nprinted, len, size;

1064

struct pci_dev *dev;

1065

# define MSG"\nwarning: page-size limit reached!\n" "\nwarning: page-size limit reached!\n"

1066

1067

/* reserve same for truncation warning message: */

1068

size = PAGE_SIZE(1 << 12) - (strlen(MSG"\nwarning: page-size limit reached!\n") + 1);

1069

len = sprintflinux_sprintf(buf, "PCI devices found:\n");

1070

1071

for (dev = pci_devices; dev; dev = dev->next) {

Loop condition is true. Entering loop body

→

1072

nprinted = sprint_dev_config(dev, buf + len, size - len);

←

Calling 'sprint_dev_config'

→

1073

if (nprinted < 0) {

1074

return len + sprintflinux_sprintf(buf + len, MSG"\nwarning: page-size limit reached!\n");

1075

}

1076

len += nprinted;

1077

}

1078

return len;

1079

}

1080

1081

1082

1083

* pci_malloc() returns initialized memory of size SIZE. Can be

1084

* used only while pci_init() is active.

1085

1086

static void *pci_malloc(long size, unsigned long *mem_startp)

1087

{

1088

void *mem;

1089

1090

#ifdef DEBUG

1091

printk("...pci_malloc(size=%ld,mem=%p)", size, *mem_startp);

1092

#endif

1093

mem = (void*) *mem_startp;

1094

*mem_startp += (size + sizeof(void*) - 1) & ~(sizeof(void*) - 1);

1095

memset(mem, 0, size)(__builtin_constant_p(0) ? (__builtin_constant_p((size)) ? __constant_c_and_count_memset
(((mem)),((0x01010101UL*(unsigned char)(0))),((size))) : __constant_c_memset
(((mem)),((0x01010101UL*(unsigned char)(0))),((size)))) : (__builtin_constant_p
((size)) ? __memset_generic((((mem))),(((0))),(((size)))) : __memset_generic
(((mem)),((0)),((size)))));

1096

return mem;

1097

}

1098

1099

1100

static unsigned int scan_bus(struct pci_bus *bus, unsigned long *mem_startp)

1101

{

1102

unsigned int devfn, l, max;

1103

unsigned char cmd, tmp, hdr_type, ht, is_multi = 0;

1104

struct pci_dev_info *info;

1105

struct pci_dev *dev;

1106

struct pci_bus *child;

1107

1108

#ifdef DEBUG

1109

printk("...scan_bus(busno=%d,mem=%p)\n", bus->number, *mem_startp);

1110

#endif

1111

1112

max = bus->secondary;

1113

for (devfn = 0; devfn < 0xff; ++devfn) {

1114

if (PCI_FUNC(devfn)((devfn) & 0x07) && !is_multi) {

1115

/* Not a multi-function device */

1116

continue;

1117

}

1118

pcibios_read_config_byte(bus->number, devfn, PCI_HEADER_TYPE0x0e, &hdr_type);

1119

if (!PCI_FUNC(devfn)((devfn) & 0x07))

1120

is_multi = hdr_type & 0x80;

1121

1122

pcibios_read_config_dword(bus->number, devfn, PCI_VENDOR_ID0x00, &l);

1123

/* some broken boards return 0 if a slot is empty: */

1124

if (l == 0xffffffff || l == 0x00000000 || l == 0x0000ffff || l == 0xffff0000)

1125

continue;

1126

1127

dev = pci_malloc(sizeof(*dev), mem_startp);

1128

dev->bus = bus;

1129

dev->devfn = devfn;

1130

dev->vendor = l & 0xffff;

1131

dev->device = (l >> 16) & 0xffff;

1132

1133

1134

* Check to see if we know about this device and report

1135

* a message at boot time. This is the only way to

1136

* learn about new hardware...

1137

1138

info = pci_lookup_dev(dev->vendor, dev->device);

1139

if (!info) {

1140

#if 0

1141

printk("Warning : Unknown PCI device (%x:%x). Please read include/linux/pci.h\n",

1142

dev->vendor, dev->device);

1143

#endif

1144

} else {

1145

/* Some BIOS' are lazy. Let's do their job: */

1146

if (info->bridge_type != 0xff) {

1147

burst_bridge(bus->number, devfn,

1148

info->bridge_type, 1);

1149

}

1150

}

1151

1152

/* non-destructively determine if device can be a master: */

1153

pcibios_read_config_byte(bus->number, devfn, PCI_COMMAND0x04,

1154

&cmd);

1155

pcibios_write_config_byte(bus->number, devfn, PCI_COMMAND0x04,

1156

cmd | PCI_COMMAND_MASTER0x4);

1157

pcibios_read_config_byte(bus->number, devfn, PCI_COMMAND0x04,

1158

&tmp);

1159

dev->master = ((tmp & PCI_COMMAND_MASTER0x4) != 0);

1160

pcibios_write_config_byte(bus->number, devfn, PCI_COMMAND0x04,

1161

cmd);

1162

1163

/* read irq level (may be changed during pcibios_fixup()): */

1164

pcibios_read_config_byte(bus->number, devfn,

1165

PCI_INTERRUPT_LINE0x3c, &dev->irq);

1166

1167

/* check to see if this device is a PCI-PCI bridge: */

1168

pcibios_read_config_dword(bus->number, devfn,

1169

PCI_CLASS_REVISION0x08, &l);

1170

l = l >> 8; /* upper 3 bytes */

1171

dev->class = l;

1172

1173

1174

* Check if the header type is known and consistent with

1175

* device type. PCI-to-PCI Bridges should have hdr_type 1,

1176

* CardBus Bridges 2, all other devices 0.

1177

1178

switch (dev->class >> 8) {

1179

case PCI_CLASS_BRIDGE_PCI0x0604:

1180

ht = 1;

1181

break;

1182

case PCI_CLASS_BRIDGE_CARDBUS0x0607:

1183

ht = 2;

1184

break;

1185

default:

1186

ht = 0;

1187

}

1188

if (ht != (hdr_type & 0x7f)) {

1189

printk(KERN_WARNING"<4>" "PCI: %02x:%02x [%04x/%04x/%06x] has unknown header type %02x, ignoring.\n",

1190

bus->number, dev->devfn, dev->vendor, dev->device, dev->class, hdr_type);

1191

continue;

1192

}

1193

1194

1195

* Put it into the simple chain of all PCI devices.

1196

* It is used to find devices once everything is set up.

1197

1198

dev->next = pci_devices;

1199

pci_devices = dev;

1200

1201

1202

* Now insert it into the list of devices held

1203

* by the parent bus.

1204

1205

dev->sibling = bus->devices;

1206

bus->devices = dev;

1207

1208

if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI0x0604) {

1209

unsigned int buses;

1210

unsigned short cr;

1211

1212

1213

* Insert it into the tree of buses.

1214

1215

child = pci_malloc(sizeof(*child), mem_startp);

1216

child->next = bus->children;

1217

bus->children = child;

1218

child->self = dev;

1219

child->parent = bus;

1220

1221

1222

* Set up the primary, secondary and subordinate

1223

* bus numbers.

1224

1225

child->number = child->secondary = ++max;

1226

child->primary = bus->secondary;

1227

child->subordinate = 0xff;

1228

1229

* Clear all status bits and turn off memory,

1230

* I/O and master enables.

1231

1232

pcibios_read_config_word(bus->number, devfn,

1233

PCI_COMMAND0x04, &cr);

1234

pcibios_write_config_word(bus->number, devfn,

1235

PCI_COMMAND0x04, 0x0000);

1236

pcibios_write_config_word(bus->number, devfn,

1237

PCI_STATUS0x06, 0xffff);

1238

1239

* Read the existing primary/secondary/subordinate bus

1240

* number configuration to determine if the PCI bridge

1241

* has already been configured by the system. If so,

1242

* do not modify the configuration, merely note it.

1243

1244

pcibios_read_config_dword(bus->number, devfn, 0x18,

1245

&buses);

1246

if ((buses & 0xFFFFFF) != 0)

1247

{

1248

child->primary = buses & 0xFF;

1249

child->secondary = (buses >> 8) & 0xFF;

1250

child->subordinate = (buses >> 16) & 0xFF;

1251

child->number = child->secondary;

1252

max = scan_bus(child, mem_startp);

1253

}

1254

else

1255

{

1256

1257

* Configure the bus numbers for this bridge:

1258

1259

buses &= 0xff000000;

1260

buses |=

1261

(((unsigned int)(child->primary) << 0) |

1262

((unsigned int)(child->secondary) << 8) |

1263

((unsigned int)(child->subordinate) << 16));

1264

pcibios_write_config_dword(bus->number, devfn, 0x18,

1265

buses);

1266

1267

* Now we can scan all subordinate buses:

1268

1269

max = scan_bus(child, mem_startp);

1270

1271

* Set the subordinate bus number to its real

1272

* value:

1273

1274

child->subordinate = max;

1275

buses = (buses & 0xff00ffff)

1276

| ((unsigned int)(child->subordinate) << 16);

1277

pcibios_write_config_dword(bus->number, devfn, 0x18,

1278

buses);

1279

}

1280

pcibios_write_config_word(bus->number, devfn,

1281

PCI_COMMAND0x04, cr);

1282

}

1283

}

1284

1285

* We've scanned the bus and so we know all about what's on

1286

* the other side of any bridges that may be on this bus plus

1287

* any devices.

1288

1289

* Return how far we've got finding sub-buses.

1290

1291

return max;

1292

}

1293

1294

1295

unsigned long pci_init (unsigned long mem_start, unsigned long mem_end)

1296

{

1297

mem_start = pcibios_init(mem_start, mem_end);

1298

1299

if (!pcibios_present()) {

1300

printk("pci_init: no BIOS32 detected\n");

1301

return mem_start;

1302

}

1303

1304

printk("Probing PCI hardware.\n");

1305

1306

memset(&pci_root, 0, sizeof(pci_root))(__builtin_constant_p(0) ? (__builtin_constant_p((sizeof(pci_root
))) ? __constant_c_and_count_memset(((&pci_root)),((0x01010101UL
*(unsigned char)(0))),((sizeof(pci_root)))) : __constant_c_memset
(((&pci_root)),((0x01010101UL*(unsigned char)(0))),((sizeof
(pci_root))))) : (__builtin_constant_p((sizeof(pci_root))) ? __memset_generic
((((&pci_root))),(((0))),(((sizeof(pci_root))))) : __memset_generic
(((&pci_root)),((0)),((sizeof(pci_root))))));

1307

pci_root.subordinate = scan_bus(&pci_root, &mem_start);

1308

1309

/* give BIOS a chance to apply platform specific fixes: */

1310

mem_start = pcibios_fixup(mem_start, mem_end);

1311

1312

#ifdef DEBUG

1313

{

1314

int len = get_pci_list((char*)mem_start);

1315

if (len) {

1316

((char *) mem_start)[len] = '\0';

1317

printk("%s\n", (char *) mem_start);

1318

}

1319

}

1320

#endif

1321

return mem_start;

1322

}