Bug Summary

File:obj-scan-build/../linux/src/drivers/scsi/NCR5380.c
Location:line 2253, column 3
Description:Value stored to 'timeout' is never read

Annotated Source Code

1#ifndef NDEBUG(0x40000 | NDEBUG_ABORT)
2#define NDEBUG(0x40000 | NDEBUG_ABORT) (NDEBUG_RESTART_SELECT0x40000 | NDEBUG_ABORT)
3#endif
4/*
5 * NCR 5380 generic driver routines. These should make it *trivial*
6 * to implement 5380 SCSI drivers under Linux with a non-trantor
7 * architecture.
8 *
9 * Note that these routines also work with NR53c400 family chips.
10 *
11 * Copyright 1993, Drew Eckhardt
12 * Visionary Computing
13 * (Unix and Linux consulting and custom programming)
14 * drew@colorado.edu
15 * +1 (303) 666-5836
16 *
17 * DISTRIBUTION RELEASE 6.
18 *
19 * For more information, please consult
20 *
21 * NCR 5380 Family
22 * SCSI Protocol Controller
23 * Databook
24 *
25 * NCR Microelectronics
26 * 1635 Aeroplaza Drive
27 * Colorado Springs, CO 80916
28 * 1+ (719) 578-3400
29 * 1+ (800) 334-5454
30 */
31
32/*
33 * Revision 1.7 1996/3/2 Ray Van Tassle (rayvt@comm.mot.com)
34 * added proc_info
35 * added support needed for DTC 3180/3280
36 * fixed a couple of bugs
37 *
38
39 * Revision 1.5 1994/01/19 09:14:57 drew
40 * Fixed udelay() hack that was being used on DATAOUT phases
41 * instead of a proper wait for the final handshake.
42 *
43 * Revision 1.4 1994/01/19 06:44:25 drew
44 * *** empty log message ***
45 *
46 * Revision 1.3 1994/01/19 05:24:40 drew
47 * Added support for TCR LAST_BYTE_SENT bit.
48 *
49 * Revision 1.2 1994/01/15 06:14:11 drew
50 * REAL DMA support, bug fixes.
51 *
52 * Revision 1.1 1994/01/15 06:00:54 drew
53 * Initial revision
54 *
55 */
56
57/*
58 * Further development / testing that should be done :
59 * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete
60 * code so that everything does the same thing that's done at the
61 * end of a pseudo-DMA read operation.
62 *
63 * 2. Fix REAL_DMA (interrupt driven, polled works fine) -
64 * basically, transfer size needs to be reduced by one
65 * and the last byte read as is done with PSEUDO_DMA.
66 *
67 * 3. Test USLEEP code
68 *
69 * 4. Test SCSI-II tagged queueing (I have no devices which support
70 * tagged queueing)
71 *
72 * 5. Test linked command handling code after Eric is ready with
73 * the high level code.
74 */
75
76#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LISTS0x400000)
77#define LIST(x,y) {printk("LINE:%d Adding %p to %p\n", __LINE__77, (void*)(x), (void*)(y)); if ((x)==(y)) udelay(5)(__builtin_constant_p(5) ? __const_udelay((5) * 0x10c6ul) : __udelay
(5)); }
78#define REMOVE(w,x,y,z) {printk("LINE:%d Removing: %p->%p %p->%p \n", __LINE__78, (void*)(w), (void*)(x), (void*)(y), (void*)(z)); if ((x)==(y)) udelay(5)(__builtin_constant_p(5) ? __const_udelay((5) * 0x10c6ul) : __udelay
(5)); }
79#else
80#define LIST(x,y)
81#define REMOVE(w,x,y,z)
82#endif
83
84#ifndef notyet
85#undef LINKED
86#undef USLEEP
87#undef REAL_DMA
88#endif
89
90#ifdef REAL_DMA_POLL
91#undef READ_OVERRUNS
92#define READ_OVERRUNS
93#endif
94
95/*
96 * Design
97 * Issues :
98 *
99 * The other Linux SCSI drivers were written when Linux was Intel PC-only,
100 * and specifically for each board rather than each chip. This makes their
101 * adaptation to platforms like the Mac (Some of which use NCR5380's)
102 * more difficult than it has to be.
103 *
104 * Also, many of the SCSI drivers were written before the command queuing
105 * routines were implemented, meaning their implementations of queued
106 * commands were hacked on rather than designed in from the start.
107 *
108 * When I designed the Linux SCSI drivers I figured that
109 * while having two different SCSI boards in a system might be useful
110 * for debugging things, two of the same type wouldn't be used.
111 * Well, I was wrong and a number of users have mailed me about running
112 * multiple high-performance SCSI boards in a server.
113 *
114 * Finally, when I get questions from users, I have no idea what
115 * revision of my driver they are running.
116 *
117 * This driver attempts to address these problems :
118 * This is a generic 5380 driver. To use it on a different platform,
119 * one simply writes appropriate system specific macros (ie, data
120 * transfer - some PC's will use the I/O bus, 68K's must use
121 * memory mapped) and drops this file in their 'C' wrapper.
122 *
123 * As far as command queueing, two queues are maintained for
124 * each 5380 in the system - commands that haven't been issued yet,
125 * and commands that are currently executing. This means that an
126 * unlimited number of commands may be queued, letting
127 * more commands propagate from the higher driver levels giving higher
128 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
129 * allowing multiple commands to propagate all the way to a SCSI-II device
130 * while a command is already executing.
131 *
132 * To solve the multiple-boards-in-the-same-system problem,
133 * there is a separate instance structure for each instance
134 * of a 5380 in the system. So, multiple NCR5380 drivers will
135 * be able to coexist with appropriate changes to the high level
136 * SCSI code.
137 *
138 * A NCR5380_PUBLIC_REVISION macro is provided, with the release
139 * number (updated for each public release) printed by the
140 * NCR5380_print_options command, which should be called from the
141 * wrapper detect function, so that I know what release of the driver
142 * users are using.
143 *
144 * Issues specific to the NCR5380 :
145 *
146 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
147 * piece of hardware that requires you to sit in a loop polling for
148 * the REQ signal as long as you are connected. Some devices are
149 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
150 * while doing long seek operations.
151 *
152 * The workaround for this is to keep track of devices that have
153 * disconnected. If the device hasn't disconnected, for commands that
154 * should disconnect, we do something like
155 *
156 * while (!REQ is asserted) { sleep for N usecs; poll for M usecs }
157 *
158 * Some tweaking of N and M needs to be done. An algorithm based
159 * on "time to data" would give the best results as long as short time
160 * to datas (ie, on the same track) were considered, however these
161 * broken devices are the exception rather than the rule and I'd rather
162 * spend my time optimizing for the normal case.
163 *
164 * Architecture :
165 *
166 * At the heart of the design is a coroutine, NCR5380_main,
167 * which is started when not running by the interrupt handler,
168 * timer, and queue command function. It attempts to establish
169 * I_T_L or I_T_L_Q nexuses by removing the commands from the
170 * issue queue and calling NCR5380_select() if a nexus
171 * is not established.
172 *
173 * Once a nexus is established, the NCR5380_information_transfer()
174 * phase goes through the various phases as instructed by the target.
175 * if the target goes into MSG IN and sends a DISCONNECT message,
176 * the command structure is placed into the per instance disconnected
177 * queue, and NCR5380_main tries to find more work. If USLEEP
178 * was defined, and the target is idle for too long, the system
179 * will try to sleep.
180 *
181 * If a command has disconnected, eventually an interrupt will trigger,
182 * calling NCR5380_intr() which will in turn call NCR5380_reselect
183 * to reestablish a nexus. This will run main if necessary.
184 *
185 * On command termination, the done function will be called as
186 * appropriate.
187 *
188 * SCSI pointers are maintained in the SCp field of SCSI command
189 * structures, being initialized after the command is connected
190 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
191 * Note that in violation of the standard, an implicit SAVE POINTERS operation
192 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
193 */
194
195/*
196 * Using this file :
197 * This file a skeleton Linux SCSI driver for the NCR 5380 series
198 * of chips. To use it, you write a architecture specific functions
199 * and macros and include this file in your driver.
200 *
201 * These macros control options :
202 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
203 * defined.
204 *
205 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
206 * for commands that return with a CHECK CONDITION status.
207 *
208 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
209 * transceivers.
210 *
211 * DONT_USE_INTR - if defined, never use interrupts, even if we probe or
212 * override-configure an IRQ.
213 *
214 * LIMIT_TRANSFERSIZE - if defined, limit the pseudo-dma transfers to 512
215 * bytes at a time. Since interrupts are disabled by default during
216 * these transfers, we might need this to give reasonable interrupt
217 * service time if the transfer size gets too large.
218 *
219 * LINKED - if defined, linked commands are supported.
220 *
221 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
222 *
223 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
224 *
225 * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't
226 * rely on phase mismatch and EOP interrupts to determine end
227 * of phase.
228 *
229 * SCSI2 - if defined, SCSI-2 tagged queuing is used where possible
230 *
231 * UNSAFE - leave interrupts enabled during pseudo-DMA transfers. You
232 * only really want to use this if you're having a problem with
233 * dropped characters during high speed communications, and even
234 * then, you're going to be better off twiddling with transfersize
235 * in the high level code.
236 *
237 * USLEEP - if defined, on devices that aren't disconnecting from the
238 * bus, we will go to sleep so that the CPU can get real work done
239 * when we run a command that won't complete immediately.
240 *
241 * Note that if USLEEP is defined, NCR5380_TIMER *must* also be
242 * defined.
243 *
244 * Defaults for these will be provided if USLEEP is defined, although
245 * the user may want to adjust these to allocate CPU resources to
246 * the SCSI driver or "real" code.
247 *
248 * USLEEP_SLEEP - amount of time, in jiffies, to sleep
249 *
250 * USLEEP_POLL - amount of time, in jiffies, to poll
251 *
252 * These macros MUST be defined :
253 * NCR5380_local_declare() - declare any local variables needed for your
254 * transfer routines.
255 *
256 * NCR5380_setup(instance) - initialize any local variables needed from a given
257 * instance of the host adapter for NCR5380_{read,write,pread,pwrite}
258 *
259 * NCR5380_read(register) - read from the specified register
260 *
261 * NCR5380_write(register, value) - write to the specific register
262 *
263 * NCR5380_implementation_fields - additional fields needed for this
264 * specific implementation of the NCR5380
265 *
266 * Either real DMA *or* pseudo DMA may be implemented
267 * REAL functions :
268 * NCR5380_REAL_DMA should be defined if real DMA is to be used.
269 * Note that the DMA setup functions should return the number of bytes
270 * that they were able to program the controller for.
271 *
272 * Also note that generic i386/PC versions of these macros are
273 * available as NCR5380_i386_dma_write_setup,
274 * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual.
275 *
276 * NCR5380_dma_write_setup(instance, src, count) - initialize
277 * NCR5380_dma_read_setup(instance, dst, count) - initialize
278 * NCR5380_dma_residual(instance); - residual count
279 *
280 * PSEUDO functions :
281 * NCR5380_pwrite(instance, src, count)
282 * NCR5380_pread(instance, dst, count);
283 *
284 * If nothing specific to this implementation needs doing (ie, with external
285 * hardware), you must also define
286 *
287 * NCR5380_queue_command
288 * NCR5380_reset
289 * NCR5380_abort
290 * NCR5380_proc_info
291 *
292 * to be the global entry points into the specific driver, ie
293 * #define NCR5380_queue_command t128_queue_command.
294 *
295 * If this is not done, the routines will be defined as static functions
296 * with the NCR5380* names and the user must provide a globally
297 * accessible wrapper function.
298 *
299 * The generic driver is initialized by calling NCR5380_init(instance),
300 * after setting the appropriate host specific fields and ID. If the
301 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
302 * possible) function may be used. Before the specific driver initialization
303 * code finishes, NCR5380_print_options should be called.
304 */
305
306static int do_abort (struct Scsi_Host *host);
307static void do_reset (struct Scsi_Host *host);
308static struct Scsi_Host *first_instance = NULL((void *) 0);
309static Scsi_Host_Template *the_template = NULL((void *) 0);
310
311/*
312 * Function : void initialize_SCp(Scsi_Cmnd *cmd)
313 *
314 * Purpose : initialize the saved data pointers for cmd to point to the
315 * start of the buffer.
316 *
317 * Inputs : cmd - Scsi_Cmnd structure to have pointers reset.
318 */
319
320static __inline____inline__ __attribute__((always_inline)) void initialize_SCp(Scsi_Cmnd *cmd) {
321 /*
322 * Initialize the Scsi Pointer field so that all of the commands in the
323 * various queues are valid.
324 */
325
326 if (cmd->use_sg) {
327 cmd->SCp.buffer = (struct scatterlist *) cmd->buffer;
328 cmd->SCp.buffers_residual = cmd->use_sg - 1;
329 cmd->SCp.ptr = (char *) cmd->SCp.buffer->address;
330 cmd->SCp.this_residual = cmd->SCp.buffer->length;
331 } else {
332 cmd->SCp.buffer = NULL((void *) 0);
333 cmd->SCp.buffers_residual = 0;
334 cmd->SCp.ptr = (char *) cmd->request_buffer;
335 cmd->SCp.this_residual = cmd->request_bufflen;
336 }
337}
338
339#include <linux/delay.h>
340
341#ifdef NDEBUG(0x40000 | NDEBUG_ABORT)
342static struct {
343 unsigned char mask;
344 const char * name;}
345signals[] = {{ SR_DBP0x01, "PARITY"}, { SR_RST0x80, "RST" }, { SR_BSY0x40, "BSY" },
346 { SR_REQ0x20, "REQ" }, { SR_MSG0x10, "MSG" }, { SR_CD0x08, "CD" }, { SR_IO0x04, "IO" },
347 { SR_SEL0x02, "SEL" }, {0, NULL((void *) 0)}},
348basrs[] = {{BASR_ATN0x02, "ATN"}, {BASR_ACK0x01, "ACK"}, {0, NULL((void *) 0)}},
349icrs[] = {{ICR_ASSERT_RST0x80, "ASSERT RST"},{ICR_ASSERT_ACK0x10, "ASSERT ACK"},
350 {ICR_ASSERT_BSY0x08, "ASSERT BSY"}, {ICR_ASSERT_SEL0x04, "ASSERT SEL"},
351 {ICR_ASSERT_ATN0x02, "ASSERT ATN"}, {ICR_ASSERT_DATA0x01, "ASSERT DATA"},
352 {0, NULL((void *) 0)}},
353mrs[] = {{MR_BLOCK_DMA_MODE0x80, "MODE BLOCK DMA"}, {MR_TARGET0x40, "MODE TARGET"},
354 {MR_ENABLE_PAR_CHECK0x20, "MODE PARITY CHECK"}, {MR_ENABLE_PAR_INTR0x10,
355 "MODE PARITY INTR"}, {MR_MONITOR_BSY0x04, "MODE MONITOR BSY"},
356 {MR_DMA_MODE0x02, "MODE DMA"}, {MR_ARBITRATE0x01, "MODE ARBITRATION"},
357 {0, NULL((void *) 0)}};
358
359/*
360 * Function : void NCR5380_print(struct Scsi_Host *instance)
361 *
362 * Purpose : print the SCSI bus signals for debugging purposes
363 *
364 * Input : instance - which NCR5380
365 */
366
367static void NCR5380_print(struct Scsi_Host *instance) {
368 NCR5380_local_declare()volatile unsigned short io_port;
369 unsigned char status, data, basr, mr, icr, i;
370 NCR5380_setup(instance)io_port = (instance)->io_port;
371 cli()__asm__ __volatile__ ("cli": : :"memory");
372 data = NCR5380_read(CURRENT_SCSI_DATA_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(0)] )) : __inb(( io_port + pas16_offset[(0)]
))) );
373 status = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) );
374 mr = NCR5380_read(MODE_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(2)] )) : __inb(( io_port + pas16_offset[(2)]
))) );
375 icr = NCR5380_read(INITIATOR_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(1)] )) : __inb(( io_port + pas16_offset[(1)]
))) );
376 basr = NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) );
377 sti()__asm__ __volatile__ ("sti": : :"memory");
378 printk("STATUS_REG: %02x ", status);
379 for (i = 0; signals[i].mask ; ++i)
380 if (status & signals[i].mask)
381 printk(",%s", signals[i].name);
382 printk("\nBASR: %02x ", basr);
383 for (i = 0; basrs[i].mask ; ++i)
384 if (basr & basrs[i].mask)
385 printk(",%s", basrs[i].name);
386 printk("\nICR: %02x ", icr);
387 for (i = 0; icrs[i].mask; ++i)
388 if (icr & icrs[i].mask)
389 printk(",%s", icrs[i].name);
390 printk("\nMODE: %02x ", mr);
391 for (i = 0; mrs[i].mask; ++i)
392 if (mr & mrs[i].mask)
393 printk(",%s", mrs[i].name);
394 printk("\n");
395}
396
397static struct {
398 unsigned char value;
399 const char *name;
400} phases[] = {
401{PHASE_DATAOUT0, "DATAOUT"}, {PHASE_DATAIN0x04, "DATAIN"}, {PHASE_CMDOUT0x08, "CMDOUT"},
402{PHASE_STATIN(0x08 | 0x04), "STATIN"}, {PHASE_MSGOUT(0x10 | 0x08), "MSGOUT"}, {PHASE_MSGIN(0x10 | 0x08 | 0x04), "MSGIN"},
403{PHASE_UNKNOWN0xff, "UNKNOWN"}};
404
405/*
406 * Function : void NCR5380_print_phase(struct Scsi_Host *instance)
407 *
408 * Purpose : print the current SCSI phase for debugging purposes
409 *
410 * Input : instance - which NCR5380
411 */
412
413static void NCR5380_print_phase(struct Scsi_Host *instance) {
414 NCR5380_local_declare()volatile unsigned short io_port;
415 unsigned char status;
416 int i;
417 NCR5380_setup(instance)io_port = (instance)->io_port;
418
419 status = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) );
420 if (!(status & SR_REQ0x20))
421 printk("scsi%d : REQ not asserted, phase unknown.\n",
422 instance->host_no);
423 else {
424 for (i = 0; (phases[i].value != PHASE_UNKNOWN0xff) &&
425 (phases[i].value != (status & PHASE_MASK(0x10 | 0x08 | 0x04))); ++i);
426 printk("scsi%d : phase %s\n", instance->host_no, phases[i].name);
427 }
428}
429#endif
430
431/*
432 * We need to have our coroutine active given these constraints :
433 * 1. The mutex flag, main_running, can only be set when the main
434 * routine can actually process data, otherwise SCSI commands
435 * will never get issued.
436 *
437 * 2. NCR5380_main() shouldn't be called before it has exited, because
438 * other drivers have had kernel stack overflows in similar
439 * situations.
440 *
441 * 3. We don't want to inline NCR5380_main() because of space concerns,
442 * even though it is only called in two places.
443 *
444 * So, the solution is to set the mutex in an inline wrapper for the
445 * main coroutine, and have the main coroutine exit with interrupts
446 * disabled after the final search through the queues so that no race
447 * conditions are possible.
448 */
449
450static volatile int main_running = 0;
451
452/*
453 * Function : run_main(void)
454 *
455 * Purpose : insure that the coroutine is running and will process our
456 * request. main_running is checked/set here (in an inline function)
457 * rather than in NCR5380_main itself to reduce the chances of stack
458 * overflow.
459 *
460 */
461
462static __inline____inline__ __attribute__((always_inline)) void run_main(void) {
463 cli()__asm__ __volatile__ ("cli": : :"memory");
464 if (!main_running) {
465 main_running = 1;
466 NCR5380_main();
467 /*
468 * main_running is cleared in NCR5380_main once it can't do
469 * more work, and NCR5380_main exits with interrupts disabled.
470 */
471 sti()__asm__ __volatile__ ("sti": : :"memory");
472 } else
473 sti()__asm__ __volatile__ ("sti": : :"memory");
474}
475
476#ifdef USLEEP
477#ifndef NCR5380_TIMER
478#error "NCR5380_TIMER must be defined so that this type of NCR5380 driver gets a unique timer."
479#endif
480
481/*
482 * These need tweaking, and would probably work best as per-device
483 * flags initialized differently for disk, tape, cd, etc devices.
484 * People with broken devices are free to experiment as to what gives
485 * the best results for them.
486 *
487 * USLEEP_SLEEP should be a minimum seek time.
488 *
489 * USLEEP_POLL should be a maximum rotational latency.
490 */
491#ifndef USLEEP_SLEEP
492/* 20 ms (reasonable hard disk speed) */
493#define USLEEP_SLEEP (20*HZ100/1000)
494#endif
495/* 300 RPM (floppy speed) */
496#ifndef USLEEP_POLL
497#define USLEEP_POLL (200*HZ100/1000)
498#endif
499
500static struct Scsi_Host * expires_first = NULL((void *) 0);
501
502/*
503 * Function : int should_disconnect (unsigned char cmd)
504 *
505 * Purpose : decide weather a command would normally disconnect or
506 * not, since if it won't disconnect we should go to sleep.
507 *
508 * Input : cmd - opcode of SCSI command
509 *
510 * Returns : DISCONNECT_LONG if we should disconnect for a really long
511 * time (ie always, sleep, look for REQ active, sleep),
512 * DISCONNECT_TIME_TO_DATA if we would only disconnect for a normal
513 * time-to-data delay, DISCONNECT_NONE if this command would return
514 * immediately.
515 *
516 * Future sleep algorithms based on time to data can exploit
517 * something like this so they can differentiate between "normal"
518 * (ie, read, write, seek) and unusual commands (ie, * format).
519 *
520 * Note : We don't deal with commands that handle an immediate disconnect,
521 *
522 */
523
524static int should_disconnect (unsigned char cmd) {
525 switch (cmd) {
526 case READ_60x08:
527 case WRITE_60x0a:
528 case SEEK_60x0b:
529 case READ_100x28:
530 case WRITE_100x2a:
531 case SEEK_100x2b:
532 return DISCONNECT_TIME_TO_DATA1;
533 case FORMAT_UNIT0x04:
534 case SEARCH_HIGH0x30:
535 case SEARCH_LOW0x32:
536 case SEARCH_EQUAL0x31:
537 return DISCONNECT_LONG2;
538 default:
539 return DISCONNECT_NONE0;
540 }
541}
542
543/*
544 * Assumes instance->time_expires has been set in higher level code.
545 */
546
547static int NCR5380_set_timer (struct Scsi_Host *instance) {
548 struct Scsi_Host *tmp, **prev;
549
550 cli()__asm__ __volatile__ ("cli": : :"memory");
551 if (((struct NCR5380_hostdata *) (instance->host_data))->next_timer) {
552 sti()__asm__ __volatile__ ("sti": : :"memory");
553 return -1;
554 }
555
556 for (prev = &expires_first, tmp = expires_first; tmp;
557 prev = &(((struct NCR5380_hostdata *) tmp->host_data)->next_timer),
558 tmp = ((struct NCR5380_hostdata *) tmp->host_data)->next_timer)
559 if (instance->time_expires < tmp->time_expires)
560 break;
561
562 instance->next_timer = tmp;
563 *prev = instance;
564 timer_table[NCR5380_TIMER].expires = expires_first->time_expires;
565 timer_active |= 1 << NCR5380_TIMER;
566 sti()__asm__ __volatile__ ("sti": : :"memory");
567 return 0;
568}
569
570/* Doing something about unwanted reentrancy here might be useful */
571void NCR5380_timer_fn(void) {
572 struct Scsi_Host *instance;
573 cli()__asm__ __volatile__ ("cli": : :"memory");
574 for (; expires_first && expires_first->time_expires >= jiffies; ) {
575 instance = ((NCR5380_hostdata *) expires_first->host_data)->
576 expires_next;
577 ((NCR5380_hostdata *) expires_first->host_data)->expires_next =
578 NULL((void *) 0);
579 ((NCR5380_hostdata *) expires_first->host_data)->time_expires =
580 0;
581 expires_first = instance;
582 }
583
584 if (expires_first) {
585 timer_table[NCR5380_TIMER].expires = ((NCR5380_hostdata *)
586 expires_first->host_data)->time_expires;
587 timer_active |= (1 << NCR5380_TIMER);
588 } else {
589 timer_table[NCR5380_TIMER].expires = 0;
590 timer_active &= ~(1 << MCR5380_TIMER);
591 }
592 sti()__asm__ __volatile__ ("sti": : :"memory");
593
594 run_main();
595}
596#endif /* def USLEEP */
597
598static void NCR5380_all_init (void) {
599 static int done = 0;
600 if (!done) {
601#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INIT0x20)
602 printk("scsi : NCR5380_all_init()\n");
603#endif
604 done = 1;
605#ifdef USLEEP
606 timer_table[NCR5380_TIMER].expires = 0;
607 timer_table[NCR5380_TIMER].fn = NCR5380_timer_fn;
608#endif
609 }
610}
611
612#ifdef AUTOPROBE_IRQ
613/*
614 * Function : int NCR5380_probe_irq (struct Scsi_Host *instance, int possible)
615 *
616 * Purpose : autoprobe for the IRQ line used by the NCR5380.
617 *
618 * Inputs : instance - pointer to this instance of the NCR5380 driver,
619 * possible - bitmask of permissible interrupts.
620 *
621 * Returns : number of the IRQ selected, IRQ_NONE if no interrupt fired.
622 *
623 * XXX no effort is made to deal with spurious interrupts.
624 */
625
626
627static int probe_irq;
628static void probe_intr (int irq, void *dev_id, struct pt_regs * regs) {
629 probe_irq = irq;
630};
631
632static int NCR5380_probe_irq (struct Scsi_Host *instance, int possible) {
633 NCR5380_local_declare()volatile unsigned short io_port;
634 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
635 instance->hostdata;
636 unsigned long timeout;
637 int trying_irqs, i, mask;
638 NCR5380_setup(instance)io_port = (instance)->io_port;
639
640 for (trying_irqs = i = 0, mask = 1; i < 16; ++i, mask <<= 1)
641 if ((mask & possible) && (request_irq(i, &probe_intr, SA_INTERRUPT0x20000000, "NCR-probe", NULL((void *) 0))
642 == 0))
643 trying_irqs |= mask;
644
645 timeout = jiffies + 250*HZ100/1000;
646 probe_irq = IRQ_NONE255;
647
648/*
649 * A interrupt is triggered whenever BSY = false, SEL = true
650 * and a bit set in the SELECT_ENABLE_REG is asserted on the
651 * SCSI bus.
652 *
653 * Note that the bus is only driven when the phase control signals
654 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
655 * to zero.
656 */
657
658 NCR5380_write(TARGET_COMMAND_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(3)] ))) : __outb(((0)),(( io_port +
pas16_offset[(3)] )))) );
659 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
660 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(0)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(0)] )))) );
661 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x04)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01
| 0x04)),(( io_port + pas16_offset[(1)] )))) )
662 ICR_ASSERT_SEL)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x04)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01
| 0x04)),(( io_port + pas16_offset[(1)] )))) );
663
664 while (probe_irq == IRQ_NONE255 && jiffies < timeout)
665 barrier()__asm__ __volatile__("": : :"memory");
666
667 NCR5380_write(SELECT_ENABLE_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(4)] ))) : __outb(((0)),(( io_port +
pas16_offset[(4)] )))) );
668 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
669
670 for (i = 0, mask = 1; i < 16; ++i, mask <<= 1)
671 if (trying_irqs & mask)
672 free_irq(i, NULL((void *) 0));
673
674 return probe_irq;
675}
676#endif /* AUTOPROBE_IRQ */
677
678/*
679 * Function : void NCR58380_print_options (struct Scsi_Host *instance)
680 *
681 * Purpose : called by probe code indicating the NCR5380 driver
682 * options that were selected.
683 *
684 * Inputs : instance, pointer to this instance. Unused.
685 */
686
687static void NCR5380_print_options (struct Scsi_Host *instance) {
688 printk(" generic options"
689#ifdef AUTOPROBE_IRQ
690 " AUTOPROBE_IRQ"
691#endif
692#ifdef AUTOSENSE
693 " AUTOSENSE"
694#endif
695#ifdef DIFFERENTIAL
696 " DIFFERENTIAL"
697#endif
698#ifdef REAL_DMA
699 " REAL DMA"
700#endif
701#ifdef REAL_DMA_POLL
702 " REAL DMA POLL"
703#endif
704#ifdef PARITY
705 " PARITY"
706#endif
707#ifdef PSEUDO_DMA
708 " PSEUDO DMA"
709#endif
710#ifdef SCSI2
711 " SCSI-2"
712#endif
713#ifdef UNSAFE
714 " UNSAFE "
715#endif
716 );
717#ifdef USLEEP
718 printk(" USLEEP, USLEEP_POLL=%d USLEEP_SLEEP=%d", USLEEP_POLL, USLEEP_SLEEP);
719#endif
720 printk(" generic release=%d", NCR5380_PUBLIC_RELEASE7);
721 if (((struct NCR5380_hostdata *)instance->hostdata)->flags & FLAG_NCR53C4004) {
722 printk(" ncr53c400 release=%d", NCR53C400_PUBLIC_RELEASE2);
723 }
724}
725
726/*
727 * Function : void NCR5380_print_status (struct Scsi_Host *instance)
728 *
729 * Purpose : print commands in the various queues, called from
730 * NCR5380_abort and NCR5380_debug to aid debugging.
731 *
732 * Inputs : instance, pointer to this instance.
733 */
734
735static void NCR5380_print_status (struct Scsi_Host *instance) {
736 static char pr_bfr[512];
737 char *start;
738 int len;
739
740 printk("NCR5380 : coroutine is%s running.\n",
741 main_running ? "" : "n't");
742
743#ifdef NDEBUG(0x40000 | NDEBUG_ABORT)
744 NCR5380_print (instance);
745 NCR5380_print_phase (instance);
746#endif
747
748 len = NCR5380_proc_infopas16_proc_info(pr_bfr, &start, 0, sizeof(pr_bfr),
749 instance->host_no, 0);
750 pr_bfr[len] = 0;
751 printk("\n%s\n", pr_bfr);
752 }
753
754/******************************************/
755/*
756 * /proc/scsi/[dtc pas16 t128 generic]/[0-ASC_NUM_BOARD_SUPPORTED]
757 *
758 * *buffer: I/O buffer
759 * **start: if inout == FALSE pointer into buffer where user read should start
760 * offset: current offset
761 * length: length of buffer
762 * hostno: Scsi_Host host_no
763 * inout: TRUE - user is writing; FALSE - user is reading
764 *
765 * Return the number of bytes read from or written
766*/
767
768#undef SPRINTF
769#define SPRINTF(args...)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,args...); } while(0) do { if(pos < buffer + length-80) pos += sprintflinux_sprintf(pos, ## args); } while(0)
770static
771char *lprint_Scsi_Cmnd (Scsi_Cmnd *cmd, char *pos, char *buffer, int length);
772static
773char *lprint_command (unsigned char *cmd, char *pos, char *buffer, int len);
774static
775char *lprint_opcode(int opcode, char *pos, char *buffer, int length);
776
777#ifndef NCR5380_proc_infopas16_proc_info
778static
779#endif
780int NCR5380_proc_infopas16_proc_info (
781 char *buffer, char **start,off_t offset,
782 int length,int hostno,int inout)
783{
784 char *pos = buffer;
785 struct Scsi_Host *instance;
786 struct NCR5380_hostdata *hostdata;
787 Scsi_Cmnd *ptr;
788
789 for (instance = first_instance; instance &&
790 instance->host_no != hostno; instance=instance->next)
791 ;
792 if (!instance)
793 return(-ESRCH3);
794 hostdata = (struct NCR5380_hostdata *)instance->hostdata;
795
796 if (inout) { /* Has data been written to the file ? */
797#ifdef DTC_PUBLIC_RELEASE
798 dtc_wmaxi = dtc_maxi = 0;
799#endif
800#ifdef PAS16_PUBLIC_RELEASE3
801 pas_wmaxi = pas_maxi = 0;
802#endif
803 return(-ENOSYS38); /* Currently this is a no-op */
804 }
805 SPRINTF("NCR5380 core release=%d. ", NCR5380_PUBLIC_RELEASE)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"NCR5380 core release=%d. ", 7); } while(0);
806 if (((struct NCR5380_hostdata *)instance->hostdata)->flags & FLAG_NCR53C4004)
807 SPRINTF("ncr53c400 release=%d. ", NCR53C400_PUBLIC_RELEASE)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"ncr53c400 release=%d. ", 2); } while(0);
808#ifdef DTC_PUBLIC_RELEASE
809 SPRINTF("DTC 3180/3280 release %d", DTC_PUBLIC_RELEASE)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"DTC 3180/3280 release %d", DTC_PUBLIC_RELEASE); } while(0);
810#endif
811#ifdef T128_PUBLIC_RELEASE
812 SPRINTF("T128 release %d", T128_PUBLIC_RELEASE)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"T128 release %d", T128_PUBLIC_RELEASE); } while(0);
813#endif
814#ifdef GENERIC_NCR5380_PUBLIC_RELEASE
815 SPRINTF("Generic5380 release %d", GENERIC_NCR5380_PUBLIC_RELEASE)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"Generic5380 release %d", GENERIC_NCR5380_PUBLIC_RELEASE); }
while(0);
816#endif
817#ifdef PAS16_PUBLIC_RELEASE3
818SPRINTF("PAS16 release=%d", PAS16_PUBLIC_RELEASE)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"PAS16 release=%d", 3); } while(0);
819#endif
820
821 SPRINTF("\nBase Addr: 0x%05lX ", (long)instance->base)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"\nBase Addr: 0x%05lX ", (long)instance->base); } while
(0);
822 SPRINTF("io_port: %04x ", (int)instance->io_port)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"io_port: %04x ", (int)instance->io_port); } while(0
);
823 if (instance->irq == IRQ_NONE255)
824 SPRINTF("IRQ: None.\n")do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"IRQ: None.\n"); } while(0);
825 else
826 SPRINTF("IRQ: %d.\n", instance->irq)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"IRQ: %d.\n", instance->irq); } while(0);
827
828#ifdef DTC_PUBLIC_RELEASE
829 SPRINTF("Highwater I/O busy_spin_counts -- write: %d read: %d\n",do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"Highwater I/O busy_spin_counts -- write: %d read: %d\n", dtc_wmaxi
, dtc_maxi); } while(0)
830 dtc_wmaxi, dtc_maxi)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"Highwater I/O busy_spin_counts -- write: %d read: %d\n", dtc_wmaxi
, dtc_maxi); } while(0);
831#endif
832#ifdef PAS16_PUBLIC_RELEASE3
833 SPRINTF("Highwater I/O busy_spin_counts -- write: %d read: %d\n",do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"Highwater I/O busy_spin_counts -- write: %d read: %d\n", pas_wmaxi
, pas_maxi); } while(0)
834 pas_wmaxi, pas_maxi)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"Highwater I/O busy_spin_counts -- write: %d read: %d\n", pas_wmaxi
, pas_maxi); } while(0);
835#endif
836 cli()__asm__ __volatile__ ("cli": : :"memory");
837 SPRINTF("NCR5380 : coroutine is%s running.\n", main_running ? "" : "n't")do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"NCR5380 : coroutine is%s running.\n", main_running ? "" : "n't"
); } while(0);
838 if (!hostdata->connected)
839 SPRINTF("scsi%d: no currently connected command\n", instance->host_no)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"scsi%d: no currently connected command\n", instance->host_no
); } while(0);
840 else
841 pos = lprint_Scsi_Cmnd ((Scsi_Cmnd *) hostdata->connected,
842 pos, buffer, length);
843 SPRINTF("scsi%d: issue_queue\n", instance->host_no)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"scsi%d: issue_queue\n", instance->host_no); } while(0);
844 for (ptr = (Scsi_Cmnd *) hostdata->issue_queue; ptr;
845 ptr = (Scsi_Cmnd *) ptr->host_scribble)
846 pos = lprint_Scsi_Cmnd (ptr, pos, buffer, length);
847
848 SPRINTF("scsi%d: disconnected_queue\n", instance->host_no)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"scsi%d: disconnected_queue\n", instance->host_no); } while
(0);
849 for (ptr = (Scsi_Cmnd *) hostdata->disconnected_queue; ptr;
850 ptr = (Scsi_Cmnd *) ptr->host_scribble)
851 pos = lprint_Scsi_Cmnd (ptr, pos, buffer, length);
852
853 sti()__asm__ __volatile__ ("sti": : :"memory");
854 *start=buffer;
855 if (pos - buffer < offset)
856 return 0;
857 else if (pos - buffer - offset < length)
858 return pos - buffer - offset;
859 return length;
860}
861
862static
863char *lprint_Scsi_Cmnd (Scsi_Cmnd *cmd, char *pos, char *buffer, int length) {
864 SPRINTF("scsi%d : destination target %d, lun %d\n",do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"scsi%d : destination target %d, lun %d\n", cmd->host->
host_no, cmd->target, cmd->lun); } while(0)
865 cmd->host->host_no, cmd->target, cmd->lun)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"scsi%d : destination target %d, lun %d\n", cmd->host->
host_no, cmd->target, cmd->lun); } while(0);
866 SPRINTF(" command = ")do { if(pos < buffer + length-80) pos += linux_sprintf(pos
," command = "); } while(0);
867 pos = lprint_command (cmd->cmnd, pos, buffer, length);
868 return (pos);
869}
870
871static
872char *lprint_command (unsigned char *command,
873 char *pos, char *buffer, int length) {
874 int i, s;
875 pos = lprint_opcode(command[0], pos, buffer, length);
876 for ( i = 1, s = COMMAND_SIZE(command[0])scsi_command_size[((command[0]) >> 5) & 7]; i < s; ++i)
877 SPRINTF("%02x ", command[i])do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"%02x ", command[i]); } while(0);
878 SPRINTF("\n")do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"\n"); } while(0);
879 return(pos);
880}
881
882static
883char *lprint_opcode(int opcode, char *pos, char *buffer, int length) {
884 SPRINTF("%2d (0x%02x)", opcode, opcode)do { if(pos < buffer + length-80) pos += linux_sprintf(pos
,"%2d (0x%02x)", opcode, opcode); } while(0);
885 return(pos);
886}
887
888
889/*
890 * Function : void NCR5380_init (struct Scsi_Host *instance, flags)
891 *
892 * Purpose : initializes *instance and corresponding 5380 chip,
893 * with flags OR'd into the initial flags value.
894 *
895 * Inputs : instance - instantiation of the 5380 driver.
896 *
897 * Notes : I assume that the host, hostno, and id bits have been
898 * set correctly. I don't care about the irq and other fields.
899 *
900 */
901
902static void NCR5380_init (struct Scsi_Host *instance, int flags) {
903 NCR5380_local_declare()volatile unsigned short io_port;
904 int i, pass;
905 unsigned long timeout;
906 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
907 instance->hostdata;
908
909 /*
910 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
911 * the base address.
912 */
913
914#ifdef NCR53C400
915 if (flags & FLAG_NCR53C4004)
916 instance->NCR5380_instance_name += NCR53C400_address_adjust;
917#endif
918
919 NCR5380_setup(instance)io_port = (instance)->io_port;
920
921 NCR5380_all_init();
922
923 hostdata->aborted = 0;
924 hostdata->id_mask = 1 << instance->this_id;
925 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
926 if (i > hostdata->id_mask)
927 hostdata->id_higher_mask |= i;
928 for (i = 0; i < 8; ++i)
929 hostdata->busy[i] = 0;
930#ifdef REAL_DMA
931 hostdata->dmalen = 0;
932#endif
933 hostdata->targets_present = 0;
934 hostdata->connected = NULL((void *) 0);
935 hostdata->issue_queue = NULL((void *) 0);
936 hostdata->disconnected_queue = NULL((void *) 0);
937#ifdef NCR5380_STATS
938 for (i = 0; i < 8; ++i) {
939 hostdata->time_read[i] = 0;
940 hostdata->time_write[i] = 0;
941 hostdata->bytes_read[i] = 0;
942 hostdata->bytes_write[i] = 0;
943 }
944 hostdata->timebase = 0;
945 hostdata->pendingw = 0;
946 hostdata->pendingr = 0;
947#endif
948
949 /* The CHECK code seems to break the 53C400. Will check it later maybe */
950 if (flags & FLAG_NCR53C4004)
951 hostdata->flags = FLAG_HAS_LAST_BYTE_SENT1 | flags;
952 else
953 hostdata->flags = FLAG_CHECK_LAST_BYTE_SENT2 | flags;
954
955 if (!the_template) {
956 the_template = instance->hostt;
957 first_instance = instance;
958 }
959
960
961#ifdef USLEEP
962 hostdata->time_expires = 0;
963 hostdata->next_timer = NULL((void *) 0);
964#endif
965
966#ifndef AUTOSENSE
967 if ((instance->cmd_per_lun > 1) || instance->can_queue > 1))
968 printk("scsi%d : WARNING : support for multiple outstanding commands enabled\n"
969 " without AUTOSENSE option, contingent allegiance conditions may\n"
970 " be incorrectly cleared.\n", instance->host_no);
971#endif /* def AUTOSENSE */
972
973 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
974 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
975 NCR5380_write(TARGET_COMMAND_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(3)] ))) : __outb(((0)),(( io_port +
pas16_offset[(3)] )))) );
976 NCR5380_write(SELECT_ENABLE_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(4)] ))) : __outb(((0)),(( io_port +
pas16_offset[(4)] )))) );
977
978#ifdef NCR53C400
979 if (hostdata->flags & FLAG_NCR53C4004) {
980 NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(NCR53C400_register_offset
-8)] ))) && (( io_port + pas16_offset[(NCR53C400_register_offset
-8)] )) < 256) ? __outbc(((0x10)),(( io_port + pas16_offset
[(NCR53C400_register_offset-8)] ))) : __outb(((0x10)),(( io_port
+ pas16_offset[(NCR53C400_register_offset-8)] )))) );
981 }
982#endif
983
984 /*
985 * Detect and correct bus wedge problems.
986 *
987 * If the system crashed, it may have crashed in a state
988 * where a SCSI command was still executing, and the
989 * SCSI bus is not in a BUS FREE STATE.
990 *
991 * If this is the case, we'll try to abort the currently
992 * established nexus which we know nothing about, and that
993 * failing, do a hard reset of the SCSI bus
994 */
995
996 for (pass = 1; (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_BSY0x40) &&
997 pass <= 6 ; ++pass) {
998 switch (pass) {
999 case 1:
1000 case 3:
1001 case 5:
1002 printk("scsi%d: SCSI bus busy, waiting up to five seconds\n",
1003 instance->host_no);
1004 timeout = jiffies + 5*HZ100;
1005 while (jiffies < timeout && (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_BSY0x40));
1006 break;
1007 case 2:
1008 printk("scsi%d: bus busy, attempting abort\n",
1009 instance->host_no);
1010 do_abort (instance);
1011 break;
1012 case 4:
1013 printk("scsi%d: bus busy, attempting reset\n",
1014 instance->host_no);
1015 do_reset (instance);
1016 break;
1017 case 6:
1018 printk("scsi%d: bus locked solid or invalid override\n",
1019 instance->host_no);
1020 }
1021 }
1022}
1023
1024/*
1025 * Function : int NCR5380_queue_command (Scsi_Cmnd *cmd,
1026 * void (*done)(Scsi_Cmnd *))
1027 *
1028 * Purpose : enqueues a SCSI command
1029 *
1030 * Inputs : cmd - SCSI command, done - function called on completion, with
1031 * a pointer to the command descriptor.
1032 *
1033 * Returns : 0
1034 *
1035 * Side effects :
1036 * cmd is added to the per instance issue_queue, with minor
1037 * twiddling done to the host specific fields of cmd. If the
1038 * main coroutine is not running, it is restarted.
1039 *
1040 */
1041
1042/* Only make static if a wrapper function is used */
1043#ifndef NCR5380_queue_commandpas16_queue_command
1044static
1045#endif
1046int NCR5380_queue_commandpas16_queue_command (Scsi_Cmnd *cmd, void (*done)(Scsi_Cmnd *)) {
1047 struct Scsi_Host *instance = cmd->host;
1048 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
1049 instance->hostdata;
1050 Scsi_Cmnd *tmp;
1051
1052#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_NO_WRITE0x400)
1053 switch (cmd->cmnd[0]) {
1054 case WRITE_60x0a:
1055 case WRITE_100x2a:
1056 printk("scsi%d : WRITE attempted with NO_WRITE debugging flag set\n",
1057 instance->host_no);
1058 cmd->result = (DID_ERROR0x07 << 16);
1059 done(cmd);
1060 return 0;
1061 }
1062#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
1063
1064#ifdef NCR5380_STATS
1065# if 0
1066 if (!hostdata->connected && !hostdata->issue_queue &&
1067 !hostdata->disconnected_queue) {
1068 hostdata->timebase = jiffies;
1069 }
1070# endif
1071# ifdef NCR5380_STAT_LIMIT
1072 if (cmd->request_bufflen > NCR5380_STAT_LIMIT)
1073# endif
1074 switch (cmd->cmnd[0])
1075 {
1076 case WRITE1:
1077 case WRITE_60x0a:
1078 case WRITE_100x2a:
1079 hostdata->time_write[cmd->target] -= (jiffies - hostdata->timebase);
1080 hostdata->bytes_write[cmd->target] += cmd->request_bufflen;
1081 hostdata->pendingw++;
1082 break;
1083 case READ0:
1084 case READ_60x08:
1085 case READ_100x28:
1086 hostdata->time_read[cmd->target] -= (jiffies - hostdata->timebase);
1087 hostdata->bytes_read[cmd->target] += cmd->request_bufflen;
1088 hostdata->pendingr++;
1089 break;
1090 }
1091#endif
1092
1093 /*
1094 * We use the host_scribble field as a pointer to the next command
1095 * in a queue
1096 */
1097
1098 cmd->host_scribble = NULL((void *) 0);
1099 cmd->scsi_done = done;
1100
1101 cmd->result = 0;
1102
1103
1104 /*
1105 * Insert the cmd into the issue queue. Note that REQUEST SENSE
1106 * commands are added to the head of the queue since any command will
1107 * clear the contingent allegiance condition that exists and the
1108 * sense data is only guaranteed to be valid while the condition exists.
1109 */
1110
1111 cli()__asm__ __volatile__ ("cli": : :"memory");
1112 if (!(hostdata->issue_queue) || (cmd->cmnd[0] == REQUEST_SENSE0x03)) {
1113 LIST(cmd, hostdata->issue_queue);
1114 cmd->host_scribble = (unsigned char *) hostdata->issue_queue;
1115 hostdata->issue_queue = cmd;
1116 } else {
1117 for (tmp = (Scsi_Cmnd *) hostdata->issue_queue; tmp->host_scribble;
1118 tmp = (Scsi_Cmnd *) tmp->host_scribble);
1119 LIST(cmd, tmp);
1120 tmp->host_scribble = (unsigned char *) cmd;
1121 }
1122#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_QUEUES0x2000)
1123 printk("scsi%d : command added to %s of queue\n", instance->host_no,
1124 (cmd->cmnd[0] == REQUEST_SENSE0x03) ? "head" : "tail");
1125#endif
1126
1127/* Run the coroutine if it isn't already running. */
1128 run_main();
1129 return 0;
1130}
1131
1132/*
1133 * Function : NCR5380_main (void)
1134 *
1135 * Purpose : NCR5380_main is a coroutine that runs as long as more work can
1136 * be done on the NCR5380 host adapters in a system. Both
1137 * NCR5380_queue_command() and NCR5380_intr() will try to start it
1138 * in case it is not running.
1139 *
1140 * NOTE : NCR5380_main exits with interrupts *disabled*, the caller should
1141 * reenable them. This prevents reentrancy and kernel stack overflow.
1142 */
1143
1144static void NCR5380_main (void) {
1145 Scsi_Cmnd *tmp, *prev;
1146 struct Scsi_Host *instance;
1147 struct NCR5380_hostdata *hostdata;
1148 int done;
1149
1150 /*
1151 * We run (with interrupts disabled) until we're sure that none of
1152 * the host adapters have anything that can be done, at which point
1153 * we set main_running to 0 and exit.
1154 *
1155 * Interrupts are enabled before doing various other internal
1156 * instructions, after we've decided that we need to run through
1157 * the loop again.
1158 *
1159 * this should prevent any race conditions.
1160 */
1161
1162 do {
1163 cli()__asm__ __volatile__ ("cli": : :"memory"); /* Freeze request queues */
1164 done = 1;
1165 for (instance = first_instance; instance &&
1166 instance->hostt == the_template; instance=instance->next) {
1167 hostdata = (struct NCR5380_hostdata *) instance->hostdata;
1168 cli()__asm__ __volatile__ ("cli": : :"memory");
1169 if (!hostdata->connected) {
1170#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_MAIN0x100)
1171 printk("scsi%d : not connected\n", instance->host_no);
1172#endif
1173 /*
1174 * Search through the issue_queue for a command destined
1175 * for a target that's not busy.
1176 */
1177#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LISTS0x400000)
1178 for (tmp= (Scsi_Cmnd *) hostdata->issue_queue, prev=NULL((void *) 0); tmp && (tmp != prev); prev=tmp, tmp=(Scsi_Cmnd*)tmp->host_scribble)
1179 ;
1180 /*printk("%p ", tmp);*/
1181 if ((tmp == prev) && tmp) printk(" LOOP\n");/* else printk("\n");*/
1182#endif
1183 for (tmp = (Scsi_Cmnd *) hostdata->issue_queue,
1184 prev = NULL((void *) 0); tmp; prev = tmp, tmp = (Scsi_Cmnd *)
1185 tmp->host_scribble) {
1186
1187#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LISTS0x400000)
1188 if (prev != tmp)
1189 printk("MAIN tmp=%p target=%d busy=%d lun=%d\n", tmp, tmp->target, hostdata->busy[tmp->target], tmp->lun);
1190#endif
1191 /* When we find one, remove it from the issue queue. */
1192 if (!(hostdata->busy[tmp->target] & (1 << tmp->lun))) {
1193 if (prev) {
1194 REMOVE(prev,prev->host_scribble,tmp,tmp->host_scribble);
1195 prev->host_scribble = tmp->host_scribble;
1196 } else {
1197 REMOVE(-1,hostdata->issue_queue,tmp,tmp->host_scribble);
1198 hostdata->issue_queue = (Scsi_Cmnd *) tmp->host_scribble;
1199 }
1200 tmp->host_scribble = NULL((void *) 0);
1201
1202 /* reenable interrupts after finding one */
1203 sti()__asm__ __volatile__ ("sti": : :"memory");
1204
1205 /*
1206 * Attempt to establish an I_T_L nexus here.
1207 * On success, instance->hostdata->connected is set.
1208 * On failure, we must add the command back to the
1209 * issue queue so we can keep trying.
1210 */
1211#if (NDEBUG(0x40000 | NDEBUG_ABORT) & (NDEBUG_MAIN0x100 | NDEBUG_QUEUES0x2000))
1212 printk("scsi%d : main() : command for target %d lun %d removed from issue_queue\n",
1213 instance->host_no, tmp->target, tmp->lun);
1214#endif
1215
1216 /*
1217 * A successful selection is defined as one that
1218 * leaves us with the command connected and
1219 * in hostdata->connected, OR has terminated the
1220 * command.
1221 *
1222 * With successful commands, we fall through
1223 * and see if we can do an information transfer,
1224 * with failures we will restart.
1225 */
1226
1227 if (!NCR5380_select(instance, tmp,
1228 /*
1229 * REQUEST SENSE commands are issued without tagged
1230 * queueing, even on SCSI-II devices because the
1231 * contingent allegiance condition exists for the
1232 * entire unit.
1233 */
1234 (tmp->cmnd[0] == REQUEST_SENSE0x03) ? TAG_NONE-2 :
1235 TAG_NEXT-1)) {
1236 break;
1237 } else {
1238 cli()__asm__ __volatile__ ("cli": : :"memory");
1239 LIST(tmp, hostdata->issue_queue);
1240 tmp->host_scribble = (unsigned char *)
1241 hostdata->issue_queue;
1242 hostdata->issue_queue = tmp;
1243 done = 0;
1244 sti()__asm__ __volatile__ ("sti": : :"memory");
1245#if (NDEBUG(0x40000 | NDEBUG_ABORT) & (NDEBUG_MAIN0x100 | NDEBUG_QUEUES0x2000))
1246 printk("scsi%d : main(): select() failed, returned to issue_queue\n",
1247 instance->host_no);
1248#endif
1249 }
1250 } /* if target/lun is not busy */
1251 } /* for */
1252 } /* if (!hostdata->connected) */
1253
1254 if (hostdata->connected
1255#ifdef REAL_DMA
1256 && !hostdata->dmalen
1257#endif
1258#ifdef USLEEP
1259 && (!hostdata->time_expires || hostdata->time_expires >= jiffies)
1260#endif
1261 ) {
1262 sti()__asm__ __volatile__ ("sti": : :"memory");
1263#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_MAIN0x100)
1264 printk("scsi%d : main() : performing information transfer\n",
1265 instance->host_no);
1266#endif
1267 NCR5380_information_transfer(instance);
1268#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_MAIN0x100)
1269 printk("scsi%d : main() : done set false\n", instance->host_no);
1270#endif
1271 done = 0;
1272 } else
1273 break;
1274 } /* for instance */
1275 } while (!done);
1276 main_running = 0;
1277}
1278
1279#ifndef DONT_USE_INTR
1280/*
1281 * Function : void NCR5380_intr (int irq)
1282 *
1283 * Purpose : handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
1284 * from the disconnected queue, and restarting NCR5380_main()
1285 * as required.
1286 *
1287 * Inputs : int irq, irq that caused this interrupt.
1288 *
1289 */
1290
1291static void NCR5380_intrpas16_intr (int irq, void *dev_id, struct pt_regs * regs) {
1292 NCR5380_local_declare()volatile unsigned short io_port;
1293 struct Scsi_Host *instance;
1294 int done;
1295 unsigned char basr;
1296#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INTR0x40)
1297 printk("scsi : NCR5380 irq %d triggered\n", irq);
1298#endif
1299 do {
1300 done = 1;
1301 for (instance = first_instance; instance && (instance->hostt ==
1302 the_template); instance = instance->next)
1303 if (instance->irq == irq) {
1304
1305 /* Look for pending interrupts */
1306 NCR5380_setup(instance)io_port = (instance)->io_port;
1307 basr = NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) );
1308 /* XXX dispatch to appropriate routine if found and done=0 */
1309 if (basr & BASR_IRQ0x10) {
1310#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INTR0x40)
1311 NCR5380_print(instance);
1312#endif
1313 if ((NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & (SR_SEL0x02 | SR_IO0x04)) ==
1314 (SR_SEL0x02 | SR_IO0x04)) {
1315 done = 0;
1316 sti()__asm__ __volatile__ ("sti": : :"memory");
1317#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INTR0x40)
1318 printk("scsi%d : SEL interrupt\n", instance->host_no);
1319#endif
1320 NCR5380_reselect(instance);
1321 (void) NCR5380_read(RESET_PARITY_INTERRUPT_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(7)] )) : __inb(( io_port + pas16_offset[(7)]
))) );
1322 } else if (basr & BASR_PARITY_ERROR0x20) {
1323#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INTR0x40)
1324 printk("scsi%d : PARITY interrupt\n", instance->host_no);
1325#endif
1326 (void) NCR5380_read(RESET_PARITY_INTERRUPT_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(7)] )) : __inb(( io_port + pas16_offset[(7)]
))) );
1327 } else if ((NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_RST0x80) == SR_RST0x80) {
1328#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INTR0x40)
1329 printk("scsi%d : RESET interrupt\n", instance->host_no);
1330#endif
1331 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(7)] )) : __inb(( io_port + pas16_offset[(7)]
))) );
1332 } else {
1333/*
1334 * XXX the rest of the interrupt conditions should *only* occur during a
1335 * DMA transfer, which I haven't gotten around to fixing yet.
1336 */
1337
1338#if defined(REAL_DMA)
1339 /*
1340 * We should only get PHASE MISMATCH and EOP interrupts
1341 * if we have DMA enabled, so do a sanity check based on
1342 * the current setting of the MODE register.
1343 */
1344
1345 if ((NCR5380_read(MODE_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(2)] )) : __inb(( io_port + pas16_offset[(2)]
))) ) & MR_DMA) && ((basr &
1346 BASR_END_DMA_TRANSFER0x80) ||
1347 !(basr & BASR_PHASE_MATCH0x08))) {
1348 int transfered;
1349
1350 if (!hostdata->connected)
1351 panic("scsi%d : received end of DMA interrupt with no connected cmd\n",
1352 instance->hostno);
1353
1354 transfered = (hostdata->dmalen - NCR5380_dma_residual(instance));
1355 hostdata->connected->SCp.this_residual -= transferred;
1356 hostdata->connected->SCp.ptr += transferred;
1357 hostdata->dmalen = 0;
1358
1359 (void) NCR5380_read(RESET_PARITY_INTERRUPT_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(7)] )) : __inb(( io_port + pas16_offset[(7)]
))) );
1360#if NCR_TIMEOUT
1361 {
1362 unsigned long timeout = jiffies + NCR_TIMEOUT;
1363
1364 while (NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & BASR_ACK0x01
1365 && jiffies < timeout)
1366 ;
1367 if (jiffies >= timeout)
1368 printk("scsi%d: timeout at NCR5380.c:%d\n",
1369 host->host_no, __LINE__1369);
1370 }
1371#else /* NCR_TIMEOUT */
1372 while (NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & BASR_ACK0x01);
1373#endif
1374
1375 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
1376 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
1377 }
1378#else
1379#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INTR0x40)
1380 printk("scsi : unknown interrupt, BASR 0x%X, MR 0x%X, SR 0x%x\n", basr, NCR5380_read(MODE_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(2)] )) : __inb(( io_port + pas16_offset[(2)]
))) ), NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ));
1381#endif
1382 (void) NCR5380_read(RESET_PARITY_INTERRUPT_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(7)] )) : __inb(( io_port + pas16_offset[(7)]
))) );
1383#endif
1384 }
1385 } /* if BASR_IRQ */
1386 if (!done)
1387 run_main();
1388 } /* if (instance->irq == irq) */
1389 } while (!done);
1390}
1391#endif
1392
1393#ifdef NCR5380_STATS
1394static void collect_stats(struct NCR5380_hostdata* hostdata, Scsi_Cmnd* cmd)
1395{
1396# ifdef NCR5380_STAT_LIMIT
1397 if (cmd->request_bufflen > NCR5380_STAT_LIMIT)
1398# endif
1399 switch (cmd->cmnd[0])
1400 {
1401 case WRITE1:
1402 case WRITE_60x0a:
1403 case WRITE_100x2a:
1404 hostdata->time_write[cmd->target] += (jiffies - hostdata->timebase);
1405 /*hostdata->bytes_write[cmd->target] += cmd->request_bufflen;*/
1406 hostdata->pendingw--;
1407 break;
1408 case READ0:
1409 case READ_60x08:
1410 case READ_100x28:
1411 hostdata->time_read[cmd->target] += (jiffies - hostdata->timebase);
1412 /*hostdata->bytes_read[cmd->target] += cmd->request_bufflen;*/
1413 hostdata->pendingr--;
1414 break;
1415 }
1416}
1417#endif
1418
1419/*
1420 * Function : int NCR5380_select (struct Scsi_Host *instance, Scsi_Cmnd *cmd,
1421 * int tag);
1422 *
1423 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
1424 * including ARBITRATION, SELECTION, and initial message out for
1425 * IDENTIFY and queue messages.
1426 *
1427 * Inputs : instance - instantiation of the 5380 driver on which this
1428 * target lives, cmd - SCSI command to execute, tag - set to TAG_NEXT for
1429 * new tag, TAG_NONE for untagged queueing, otherwise set to the tag for
1430 * the command that is presently connected.
1431 *
1432 * Returns : -1 if selection could not execute for some reason,
1433 * 0 if selection succeeded or failed because the target
1434 * did not respond.
1435 *
1436 * Side effects :
1437 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
1438 * with registers as they should have been on entry - ie
1439 * SELECT_ENABLE will be set appropriately, the NCR5380
1440 * will cease to drive any SCSI bus signals.
1441 *
1442 * If successful : I_T_L or I_T_L_Q nexus will be established,
1443 * instance->connected will be set to cmd.
1444 * SELECT interrupt will be disabled.
1445 *
1446 * If failed (no target) : cmd->scsi_done() will be called, and the
1447 * cmd->result host byte set to DID_BAD_TARGET.
1448 */
1449
1450static int NCR5380_select (struct Scsi_Host *instance, Scsi_Cmnd *cmd,
1451 int tag) {
1452 NCR5380_local_declare()volatile unsigned short io_port;
1453 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata*)
1454 instance->hostdata;
1455 unsigned char tmp[3], phase;
1456 unsigned char *data;
1457 int len;
1458 unsigned long timeout;
1459 NCR5380_setup(instance)io_port = (instance)->io_port;
1460
1461 hostdata->restart_select = 0;
1462#if defined (NDEBUG(0x40000 | NDEBUG_ABORT)) && (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ARBITRATION0x1)
1463 NCR5380_print(instance);
1464 printk("scsi%d : starting arbitration, id = %d\n", instance->host_no,
1465 instance->this_id);
1466#endif
1467 cli()__asm__ __volatile__ ("cli": : :"memory");
1468
1469 /*
1470 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1471 * data bus during SELECTION.
1472 */
1473
1474 NCR5380_write(TARGET_COMMAND_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(3)] ))) : __outb(((0)),(( io_port +
pas16_offset[(3)] )))) );
1475
1476
1477 /*
1478 * Start arbitration.
1479 */
1480
1481 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(0)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(0)] )))) );
1482 NCR5380_write(MODE_REG, MR_ARBITRATE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0x01
)),(( io_port + pas16_offset[(2)] ))) : __outb(((0x01)),(( io_port
+ pas16_offset[(2)] )))) );
1483
1484 sti()__asm__ __volatile__ ("sti": : :"memory");
1485
1486 /* Wait for arbitration logic to complete */
1487#if NCR_TIMEOUT
1488 {
1489 unsigned long timeout = jiffies + 2*NCR_TIMEOUT;
1490
1491 while (!(NCR5380_read(INITIATOR_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(1)] )) : __inb(( io_port + pas16_offset[(1)]
))) ) & ICR_ARBITRATION_PROGRESS0x40)
1492 && jiffies < timeout)
1493 ;
1494 if (jiffies >= timeout)
1495 {
1496 printk("scsi: arbitration timeout at %d\n", __LINE__1496);
1497 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
1498 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
1499 return -1;
1500 }
1501 }
1502#else /* NCR_TIMEOUT */
1503 while (!(NCR5380_read(INITIATOR_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(1)] )) : __inb(( io_port + pas16_offset[(1)]
))) ) & ICR_ARBITRATION_PROGRESS0x40));
1504#endif
1505
1506#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ARBITRATION0x1)
1507 printk("scsi%d : arbitration complete\n", instance->host_no);
1508/* Avoid GCC 2.4.5 asm needs to many reloads error */
1509 __asm__("nop");
1510#endif
1511
1512 /*
1513 * The arbitration delay is 2.2us, but this is a minimum and there is
1514 * no maximum so we can safely sleep for ceil(2.2) usecs to accommodate
1515 * the integral nature of udelay().
1516 *
1517 */
1518
1519 udelay(3)(__builtin_constant_p(3) ? __const_udelay((3) * 0x10c6ul) : __udelay
(3));
1520
1521 /* Check for lost arbitration */
1522 if ((NCR5380_read(INITIATOR_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(1)] )) : __inb(( io_port + pas16_offset[(1)]
))) ) & ICR_ARBITRATION_LOST0x20) ||
1523 (NCR5380_read(CURRENT_SCSI_DATA_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(0)] )) : __inb(( io_port + pas16_offset[(0)]
))) ) & hostdata->id_higher_mask) ||
1524 (NCR5380_read(INITIATOR_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(1)] )) : __inb(( io_port + pas16_offset[(1)]
))) ) & ICR_ARBITRATION_LOST0x20)) {
1525 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
1526#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ARBITRATION0x1)
1527 printk("scsi%d : lost arbitration, deasserting MR_ARBITRATE\n",
1528 instance->host_no);
1529#endif
1530 return -1;
1531 }
1532
1533
1534
1535 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_SEL)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x04
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x04)),(
( io_port + pas16_offset[(1)] )))) );
1536
1537 if (NCR5380_read(INITIATOR_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(1)] )) : __inb(( io_port + pas16_offset[(1)]
))) ) & ICR_ARBITRATION_LOST0x20) {
1538 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
1539 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
1540#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ARBITRATION0x1)
1541 printk("scsi%d : lost arbitration, deasserting ICR_ASSERT_SEL\n",
1542 instance->host_no);
1543#endif
1544 return -1;
1545 }
1546
1547 /*
1548 * Again, bus clear + bus settle time is 1.2us, however, this is
1549 * a minimum so we'll udelay ceil(1.2)
1550 */
1551
1552 udelay(2)(__builtin_constant_p(2) ? __const_udelay((2) * 0x10c6ul) : __udelay
(2));
1553
1554#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ARBITRATION0x1)
1555 printk("scsi%d : won arbitration\n", instance->host_no);
1556#endif
1557
1558
1559 /*
1560 * Now that we have won arbitration, start Selection process, asserting
1561 * the host and target ID's on the SCSI bus.
1562 */
1563
1564 NCR5380_write(OUTPUT_DATA_REG, (hostdata->id_mask | (1 << cmd->target)))( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __outbc((((hostdata
->id_mask | (1 << cmd->target)))),(( io_port + pas16_offset
[(0)] ))) : __outb((((hostdata->id_mask | (1 << cmd->
target)))),(( io_port + pas16_offset[(0)] )))) );
1565
1566 /*
1567 * Raise ATN while SEL is true before BSY goes false from arbitration,
1568 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1569 * phase immediately after selection.
1570 */
1571
1572 NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_BSY |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc((((0 |
0x08 | 0x01 | 0x02 | 0x04 ))),(( io_port + pas16_offset[(1)]
))) : __outb((((0 | 0x08 | 0x01 | 0x02 | 0x04 ))),(( io_port
+ pas16_offset[(1)] )))) )
1573 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL ))( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc((((0 |
0x08 | 0x01 | 0x02 | 0x04 ))),(( io_port + pas16_offset[(1)]
))) : __outb((((0 | 0x08 | 0x01 | 0x02 | 0x04 ))),(( io_port
+ pas16_offset[(1)] )))) );
1574 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
1575
1576 /*
1577 * Reselect interrupts must be turned off prior to the dropping of BSY,
1578 * otherwise we will trigger an interrupt.
1579 */
1580 NCR5380_write(SELECT_ENABLE_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(4)] ))) : __outb(((0)),(( io_port +
pas16_offset[(4)] )))) );
1581
1582 /*
1583 * The initiator shall then wait at least two deskew delays and release
1584 * the BSY signal.
1585 */
1586 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1)); /* wingel -- wait two bus deskew delay >2*45ns */
1587
1588 /* Reset BSY */
1589 NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_DATA |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc((((0 |
0x01 | 0x02 | 0x04))),(( io_port + pas16_offset[(1)] ))) : __outb
((((0 | 0x01 | 0x02 | 0x04))),(( io_port + pas16_offset[(1)] )
))) )
1590 ICR_ASSERT_ATN | ICR_ASSERT_SEL))( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc((((0 |
0x01 | 0x02 | 0x04))),(( io_port + pas16_offset[(1)] ))) : __outb
((((0 | 0x01 | 0x02 | 0x04))),(( io_port + pas16_offset[(1)] )
))) );
1591
1592 /*
1593 * Something weird happens when we cease to drive BSY - looks
1594 * like the board/chip is letting us do another read before the
1595 * appropriate propagation delay has expired, and we're confusing
1596 * a BSY signal from ourselves as the target's response to SELECTION.
1597 *
1598 * A small delay (the 'C++' frontend breaks the pipeline with an
1599 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1600 * tighter 'C' code breaks and requires this) solves the problem -
1601 * the 1 us delay is arbitrary, and only used because this delay will
1602 * be the same on other platforms and since it works here, it should
1603 * work there.
1604 *
1605 * wingel suggests that this could be due to failing to wait
1606 * one deskew delay.
1607 */
1608
1609 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1));
1610
1611#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_SELECTION0x8000)
1612 printk("scsi%d : selecting target %d\n", instance->host_no, cmd->target);
1613#endif
1614
1615 /*
1616 * The SCSI specification calls for a 250 ms timeout for the actual
1617 * selection.
1618 */
1619
1620 timeout = jiffies + 250*HZ100/1000;
1621
1622 /*
1623 * XXX very interesting - we're seeing a bounce where the BSY we
1624 * asserted is being reflected / still asserted (propagation delay?)
1625 * and it's detecting as true. Sigh.
1626 */
1627
1628 while ((jiffies < timeout) && !(NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) &
1629 (SR_BSY0x40 | SR_IO0x04)));
1630
1631 if ((NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & (SR_SEL0x02 | SR_IO0x04)) ==
1632 (SR_SEL0x02 | SR_IO0x04)) {
1633 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
1634 NCR5380_reselect(instance);
1635 printk ("scsi%d : reselection after won arbitration?\n",
1636 instance->host_no);
1637 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
1638 return -1;
1639 }
1640
1641 /*
1642 * No less than two deskew delays after the initiator detects the
1643 * BSY signal is true, it shall release the SEL signal and may
1644 * change the DATA BUS. -wingel
1645 */
1646
1647 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1));
1648
1649 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
1650
1651 if (!(NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_BSY0x40)) {
1652 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
1653 if (hostdata->targets_present & (1 << cmd->target)) {
1654 printk("scsi%d : weirdness\n", instance->host_no);
1655 if (hostdata->restart_select)
1656 printk("\trestart select\n");
1657#ifdef NDEBUG(0x40000 | NDEBUG_ABORT)
1658 NCR5380_print (instance);
1659#endif
1660 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
1661 return -1;
1662 }
1663 cmd->result = DID_BAD_TARGET0x04 << 16;
1664#ifdef NCR5380_STATS
1665 collect_stats(hostdata, cmd);
1666#endif
1667 cmd->scsi_done(cmd);
1668 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
1669#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_SELECTION0x8000)
1670 printk("scsi%d : target did not respond within 250ms\n",
1671 instance->host_no);
1672#endif
1673 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
1674 return 0;
1675 }
1676
1677 hostdata->targets_present |= (1 << cmd->target);
1678
1679 /*
1680 * Since we followed the SCSI spec, and raised ATN while SEL
1681 * was true but before BSY was false during selection, the information
1682 * transfer phase should be a MESSAGE OUT phase so that we can send the
1683 * IDENTIFY message.
1684 *
1685 * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG
1686 * message (2 bytes) with a tag ID that we increment with every command
1687 * until it wraps back to 0.
1688 *
1689 * XXX - it turns out that there are some broken SCSI-II devices,
1690 * which claim to support tagged queuing but fail when more than
1691 * some number of commands are issued at once.
1692 */
1693
1694 /* Wait for start of REQ/ACK handshake */
1695#ifdef NCR_TIMEOUT
1696 {
1697 unsigned long timeout = jiffies + NCR_TIMEOUT;
1698
1699 while (!(NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20) && jiffies < timeout);
1700
1701 if (jiffies >= timeout) {
1702 printk("scsi%d: timeout at NCR5380.c:%d\n", __LINE__1702);
1703 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
1704 return -1;
1705 }
1706 }
1707#else /* NCR_TIMEOUT */
1708 while (!(NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20));
1709#endif /* def NCR_TIMEOUT */
1710
1711#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_SELECTION0x8000)
1712 printk("scsi%d : target %d selected, going into MESSAGE OUT phase.\n",
1713 instance->host_no, cmd->target);
1714#endif
1715 tmp[0] = IDENTIFY(((instance->irq == IRQ_NONE) ? 0 : 1), cmd->lun)(0x80 | ((((instance->irq == 255) ? 0 : 1)) ? 0x40 : 0) | (
(cmd->lun) & 0x07));
1716#ifdef SCSI2
1717 if (cmd->device->tagged_queue && (tag != TAG_NONE-2)) {
1718 tmp[1] = SIMPLE_QUEUE_TAG0x20;
1719 if (tag == TAG_NEXT-1) {
1720 /* 0 is TAG_NONE, used to imply no tag for this command */
1721 if (cmd->device->current_tag == 0)
1722 cmd->device->current_tag = 1;
1723
1724 cmd->tag = cmd->device->current_tag;
1725 cmd->device->current_tag++;
1726 } else
1727 cmd->tag = (unsigned char) tag;
1728
1729 tmp[2] = cmd->tag;
1730 hostdata->last_message = SIMPLE_QUEUE_TAG0x20;
1731 len = 3;
1732 } else
1733#endif /* def SCSI2 */
1734 {
1735 len = 1;
1736 cmd->tag=0;
1737 }
1738
1739 /* Send message(s) */
1740 data = tmp;
1741 phase = PHASE_MSGOUT(0x10 | 0x08);
1742 NCR5380_transfer_pio(instance, &phase, &len, &data);
1743#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_SELECTION0x8000)
1744 printk("scsi%d : nexus established.\n", instance->host_no);
1745#endif
1746 /* XXX need to handle errors here */
1747 hostdata->connected = cmd;
1748#ifdef SCSI2
1749 if (!cmd->device->tagged_queue)
1750#endif
1751 hostdata->busy[cmd->target] |= (1 << cmd->lun);
1752
1753 initialize_SCp(cmd);
1754
1755
1756 return 0;
1757}
1758
1759/*
1760 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1761 * unsigned char *phase, int *count, unsigned char **data)
1762 *
1763 * Purpose : transfers data in given phase using polled I/O
1764 *
1765 * Inputs : instance - instance of driver, *phase - pointer to
1766 * what phase is expected, *count - pointer to number of
1767 * bytes to transfer, **data - pointer to data pointer.
1768 *
1769 * Returns : -1 when different phase is entered without transferring
1770 * maximum number of bytes, 0 if all bytes or transfered or exit
1771 * is in same phase.
1772 *
1773 * Also, *phase, *count, *data are modified in place.
1774 *
1775 * XXX Note : handling for bus free may be useful.
1776 */
1777
1778/*
1779 * Note : this code is not as quick as it could be, however it
1780 * IS 100% reliable, and for the actual data transfer where speed
1781 * counts, we will always do a pseudo DMA or DMA transfer.
1782 */
1783
1784static int NCR5380_transfer_pio (struct Scsi_Host *instance,
1785 unsigned char *phase, int *count, unsigned char **data) {
1786 NCR5380_local_declare()volatile unsigned short io_port;
1787 register unsigned char p = *phase, tmp;
1788 register int c = *count;
1789 register unsigned char *d = *data;
1790 NCR5380_setup(instance)io_port = (instance)->io_port;
1791
1792#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_PIO0x800)
1793 if (!(p & SR_IO0x04))
1794 printk("scsi%d : pio write %d bytes\n", instance->host_no, c);
1795 else
1796 printk("scsi%d : pio read %d bytes\n", instance->host_no, c);
1797#endif
1798
1799 /*
1800 * The NCR5380 chip will only drive the SCSI bus when the
1801 * phase specified in the appropriate bits of the TARGET COMMAND
1802 * REGISTER match the STATUS REGISTER
1803 */
1804
1805 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p))( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((((p)
>> 2))),(( io_port + pas16_offset[(3)] ))) : __outb(((
((p) >> 2))),(( io_port + pas16_offset[(3)] )))) );
1806
1807 do {
1808 /*
1809 * Wait for assertion of REQ, after which the phase bits will be
1810 * valid
1811 */
1812 while (!((tmp = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) )) & SR_REQ0x20));
1813
1814#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_HANDSHAKE0x8)
1815 printk("scsi%d : REQ detected\n", instance->host_no);
1816#endif
1817
1818 /* Check for phase mismatch */
1819 if ((tmp & PHASE_MASK(0x10 | 0x08 | 0x04)) != p) {
1820#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_PIO0x800)
1821 printk("scsi%d : phase mismatch\n", instance->host_no);
1822 NCR5380_print_phase(instance);
1823#endif
1824 break;
1825 }
1826
1827 /* Do actual transfer from SCSI bus to / from memory */
1828 if (!(p & SR_IO0x04))
1829 NCR5380_write(OUTPUT_DATA_REG, *d)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __outbc(((*d))
,(( io_port + pas16_offset[(0)] ))) : __outb(((*d)),(( io_port
+ pas16_offset[(0)] )))) );
1830 else
1831 *d = NCR5380_read(CURRENT_SCSI_DATA_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(0)] )) : __inb(( io_port + pas16_offset[(0)]
))) );
1832
1833 ++d;
1834
1835 /*
1836 * The SCSI standard suggests that in MSGOUT phase, the initiator
1837 * should drop ATN on the last byte of the message phase
1838 * after REQ has been asserted for the handshake but before
1839 * the initiator raises ACK.
1840 */
1841
1842 if (!(p & SR_IO0x04)) {
1843 if (!((p & SR_MSG0x10) && c > 1)) {
1844 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01)),(
( io_port + pas16_offset[(1)] )))) )
1845 ICR_ASSERT_DATA)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01)),(
( io_port + pas16_offset[(1)] )))) );
1846#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_PIO0x800)
1847 NCR5380_print(instance);
1848#endif
1849 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01
| 0x10)),(( io_port + pas16_offset[(1)] )))) )
1850 ICR_ASSERT_DATA | ICR_ASSERT_ACK)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01
| 0x10)),(( io_port + pas16_offset[(1)] )))) );
1851 } else {
1852 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x02)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01
| 0x02)),(( io_port + pas16_offset[(1)] )))) )
1853 ICR_ASSERT_DATA | ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x02)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01
| 0x02)),(( io_port + pas16_offset[(1)] )))) );
1854#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_PIO0x800)
1855 NCR5380_print(instance);
1856#endif
1857 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x02 | 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(
((0 | 0x01 | 0x02 | 0x10)),(( io_port + pas16_offset[(1)] )))
) )
1858 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
| 0x02 | 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(
((0 | 0x01 | 0x02 | 0x10)),(( io_port + pas16_offset[(1)] )))
) );
1859 }
1860 } else {
1861#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_PIO0x800)
1862 NCR5380_print(instance);
1863#endif
1864 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x10
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x10)),(
( io_port + pas16_offset[(1)] )))) );
1865 }
1866
1867 while (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20);
1868
1869#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_HANDSHAKE0x8)
1870 printk("scsi%d : req false, handshake complete\n", instance->host_no);
1871#endif
1872
1873/*
1874 * We have several special cases to consider during REQ/ACK handshaking :
1875 * 1. We were in MSGOUT phase, and we are on the last byte of the
1876 * message. ATN must be dropped as ACK is dropped.
1877 *
1878 * 2. We are in a MSGIN phase, and we are on the last byte of the
1879 * message. We must exit with ACK asserted, so that the calling
1880 * code may raise ATN before dropping ACK to reject the message.
1881 *
1882 * 3. ACK and ATN are clear and the target may proceed as normal.
1883 */
1884 if (!(p == PHASE_MSGIN(0x10 | 0x08 | 0x04) && c == 1)) {
1885 if (p == PHASE_MSGOUT(0x10 | 0x08) && c > 1)
1886 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
1887 else
1888 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
1889 }
1890 } while (--c);
1891
1892#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_PIO0x800)
1893 printk("scsi%d : residual %d\n", instance->host_no, c);
1894#endif
1895
1896 *count = c;
1897 *data = d;
1898 tmp = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) );
1899 if (tmp & SR_REQ0x20)
1900 *phase = tmp & PHASE_MASK(0x10 | 0x08 | 0x04);
1901 else
1902 *phase = PHASE_UNKNOWN0xff;
1903
1904 if (!c || (*phase == p))
1905 return 0;
1906 else
1907 return -1;
1908}
1909
1910static void do_reset (struct Scsi_Host *host) {
1911 NCR5380_local_declare()volatile unsigned short io_port;
1912 NCR5380_setup(host)io_port = (host)->io_port;
1913
1914 cli()__asm__ __volatile__ ("cli": : :"memory");
1915 NCR5380_write(TARGET_COMMAND_REG,( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((((( (
(__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & (0x10 | 0x08 | 0x04)) >> 2))),(( io_port +
pas16_offset[(3)] ))) : __outb(((((( ((__builtin_constant_p(
(( io_port + pas16_offset[(4)] ))) && (( io_port + pas16_offset
[(4)] )) < 256) ? __inbc(( io_port + pas16_offset[(4)] )) :
__inb(( io_port + pas16_offset[(4)] ))) ) & (0x10 | 0x08
| 0x04)) >> 2))),(( io_port + pas16_offset[(3)] )))) )
1916 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK))( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((((( (
(__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & (0x10 | 0x08 | 0x04)) >> 2))),(( io_port +
pas16_offset[(3)] ))) : __outb(((((( ((__builtin_constant_p(
(( io_port + pas16_offset[(4)] ))) && (( io_port + pas16_offset
[(4)] )) < 256) ? __inbc(( io_port + pas16_offset[(4)] )) :
__inb(( io_port + pas16_offset[(4)] ))) ) & (0x10 | 0x08
| 0x04)) >> 2))),(( io_port + pas16_offset[(3)] )))) );
1917 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x80
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x80)),(
( io_port + pas16_offset[(1)] )))) );
1918 udelay(25)(__builtin_constant_p(25) ? __const_udelay((25) * 0x10c6ul) :
__udelay(25));
1919 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
1920 sti()__asm__ __volatile__ ("sti": : :"memory");
1921}
1922
1923/*
1924 * Function : do_abort (Scsi_Host *host)
1925 *
1926 * Purpose : abort the currently established nexus. Should only be
1927 * called from a routine which can drop into a
1928 *
1929 * Returns : 0 on success, -1 on failure.
1930 */
1931
1932static int do_abort (struct Scsi_Host *host) {
1933 NCR5380_local_declare()volatile unsigned short io_port;
1934 unsigned char tmp, *msgptr, phase;
1935 int len;
1936 NCR5380_setup(host)io_port = (host)->io_port;
1937
1938
1939 /* Request message out phase */
1940 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
1941
1942 /*
1943 * Wait for the target to indicate a valid phase by asserting
1944 * REQ. Once this happens, we'll have either a MSGOUT phase
1945 * and can immediately send the ABORT message, or we'll have some
1946 * other phase and will have to source/sink data.
1947 *
1948 * We really don't care what value was on the bus or what value
1949 * the target sees, so we just handshake.
1950 */
1951
1952 while (!((tmp = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) )) & SR_REQ0x20));
1953
1954 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp))( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((((tmp
) >> 2))),(( io_port + pas16_offset[(3)] ))) : __outb((
(((tmp) >> 2))),(( io_port + pas16_offset[(3)] )))) );
1955
1956 if ((tmp & PHASE_MASK(0x10 | 0x08 | 0x04)) != PHASE_MSGOUT(0x10 | 0x08)) {
1957 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] )))) )
1958 ICR_ASSERT_ACK)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] )))) );
1959 while (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20);
1960 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
1961 }
1962
1963 tmp = ABORT0x06;
1964 msgptr = &tmp;
1965 len = 1;
1966 phase = PHASE_MSGOUT(0x10 | 0x08);
1967 NCR5380_transfer_pio (host, &phase, &len, &msgptr);
1968
1969 /*
1970 * If we got here, and the command completed successfully,
1971 * we're about to go into bus free state.
1972 */
1973
1974 return len ? -1 : 0;
1975}
1976
1977#if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL)
1978/*
1979 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1980 * unsigned char *phase, int *count, unsigned char **data)
1981 *
1982 * Purpose : transfers data in given phase using either real
1983 * or pseudo DMA.
1984 *
1985 * Inputs : instance - instance of driver, *phase - pointer to
1986 * what phase is expected, *count - pointer to number of
1987 * bytes to transfer, **data - pointer to data pointer.
1988 *
1989 * Returns : -1 when different phase is entered without transferring
1990 * maximum number of bytes, 0 if all bytes or transfered or exit
1991 * is in same phase.
1992 *
1993 * Also, *phase, *count, *data are modified in place.
1994 *
1995 */
1996
1997
1998static int NCR5380_transfer_dma (struct Scsi_Host *instance,
1999 unsigned char *phase, int *count, unsigned char **data) {
2000 NCR5380_local_declare()volatile unsigned short io_port;
2001 register int c = *count;
2002 register unsigned char p = *phase;
2003 register unsigned char *d = *data;
2004 unsigned char tmp;
2005 int foo;
2006#if defined(REAL_DMA_POLL)
2007 int cnt, toPIO;
2008 unsigned char saved_data = 0, overrun = 0, residue;
2009#endif
2010
2011 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
2012 instance->hostdata;
2013
2014 NCR5380_setup(instance)io_port = (instance)->io_port;
2015
2016 if ((tmp = (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & PHASE_MASK(0x10 | 0x08 | 0x04))) != p) {
2017 *phase = tmp;
2018 return -1;
2019 }
2020#if defined(REAL_DMA) || defined(REAL_DMA_POLL)
2021#ifdef READ_OVERRUNS
2022 if (p & SR_IO0x04) {
2023 c -= 2;
2024 }
2025#endif
2026#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_DMA0x4)
2027 printk("scsi%d : initializing DMA channel %d for %s, %d bytes %s %0x\n",
2028 instance->host_no, instance->dma_channel, (p & SR_IO0x04) ? "reading" :
2029 "writing", c, (p & SR_IO0x04) ? "to" : "from", (unsigned) d);
2030#endif
2031 hostdata->dma_len = (p & SR_IO0x04) ?
2032 NCR5380_dma_read_setup(instance, d, c) :
2033 NCR5380_dma_write_setup(instance, d, c);
2034#endif
2035
2036 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p))( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((((p)
>> 2))),(( io_port + pas16_offset[(3)] ))) : __outb(((
((p) >> 2))),(( io_port + pas16_offset[(3)] )))) );
2037
2038#ifdef REAL_DMA
2039 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_ENABLE_EOP_INTR | MR_MONITOR_BSY)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0 | 0x02
| 0x08 | 0x04)),(( io_port + pas16_offset[(2)] ))) : __outb(
((0 | 0x02 | 0x08 | 0x04)),(( io_port + pas16_offset[(2)] )))
) );
2040#elif defined(REAL_DMA_POLL)
2041 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(2)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(2)] )))) );
2042#else
2043 /*
2044 * Note : on my sample board, watch-dog timeouts occurred when interrupts
2045 * were not disabled for the duration of a single DMA transfer, from
2046 * before the setting of DMA mode to after transfer of the last byte.
2047 */
2048
2049#if defined(PSEUDO_DMA) && !defined(UNSAFE)
2050 cli()__asm__ __volatile__ ("cli": : :"memory");
2051#endif
2052 /* KLL May need eop and parity in 53c400 */
2053 if (hostdata->flags & FLAG_NCR53C4004)
2054 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_ENABLE_PAR_CHECK( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0 | 0x02
| 0x20 | 0x10 | 0x08 | 0x02 | 0x04)),(( io_port + pas16_offset
[(2)] ))) : __outb(((0 | 0x02 | 0x20 | 0x10 | 0x08 | 0x02 | 0x04
)),(( io_port + pas16_offset[(2)] )))) )
2055 | MR_ENABLE_PAR_INTR | MR_ENABLE_EOP_INTR | MR_DMA_MODE( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0 | 0x02
| 0x20 | 0x10 | 0x08 | 0x02 | 0x04)),(( io_port + pas16_offset
[(2)] ))) : __outb(((0 | 0x02 | 0x20 | 0x10 | 0x08 | 0x02 | 0x04
)),(( io_port + pas16_offset[(2)] )))) )
2056 | MR_MONITOR_BSY)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0 | 0x02
| 0x20 | 0x10 | 0x08 | 0x02 | 0x04)),(( io_port + pas16_offset
[(2)] ))) : __outb(((0 | 0x02 | 0x20 | 0x10 | 0x08 | 0x02 | 0x04
)),(( io_port + pas16_offset[(2)] )))) );
2057 else
2058 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(2)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(2)] )))) );
2059#endif /* def REAL_DMA */
2060
2061#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_DMA0x4) & 0
2062 printk("scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(2)] )) : __inb(( io_port + pas16_offset[(2)]
))) ));
2063#endif
2064
2065/*
2066 * FOO stuff. For some UNAPPARENT reason, I'm getting
2067 * watchdog timers fired on bootup for NO APPARENT REASON, meaning it's
2068 * probably a timing problem.
2069 *
2070 * Since this is the only place I have back-to-back writes, perhaps this
2071 * is the problem?
2072 */
2073
2074 if (p & SR_IO0x04) {
2075#ifndef FOO
2076 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1));
2077#endif
2078 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(7)] ))) : __outb(((0)),(( io_port +
pas16_offset[(7)] )))) );
2079 } else {
2080#ifndef FOO
2081 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1));
2082#endif
2083 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x01
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x01)),(
( io_port + pas16_offset[(1)] )))) );
2084#ifndef FOO
2085 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1));
2086#endif
2087 NCR5380_write(START_DMA_SEND_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(5)] ))) : __outb(((0)),(( io_port +
pas16_offset[(5)] )))) );
2088#ifndef FOO
2089 udelay(1)(__builtin_constant_p(1) ? __const_udelay((1) * 0x10c6ul) : __udelay
(1));
2090#endif
2091 }
2092
2093#if defined(REAL_DMA_POLL)
2094 do {
2095 tmp = NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) );
2096 } while ((tmp & BASR_PHASE_MATCH0x08) && !(tmp & (BASR_BUSY_ERROR0x04 |
2097 BASR_END_DMA_TRANSFER0x80)));
2098
2099/*
2100 At this point, either we've completed DMA, or we have a phase mismatch,
2101 or we've unexpectedly lost BUSY (which is a real error).
2102
2103 For write DMAs, we want to wait until the last byte has been
2104 transferred out over the bus before we turn off DMA mode. Alas, there
2105 seems to be no terribly good way of doing this on a 5380 under all
2106 conditions. For non-scatter-gather operations, we can wait until REQ
2107 and ACK both go false, or until a phase mismatch occurs. Gather-writes
2108 are nastier, since the device will be expecting more data than we
2109 are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
2110 could test LAST BIT SENT to assure transfer (I imagine this is precisely
2111 why this signal was added to the newer chips) but on the older 538[01]
2112 this signal does not exist. The workaround for this lack is a watchdog;
2113 we bail out of the wait-loop after a modest amount of wait-time if
2114 the usual exit conditions are not met. Not a terribly clean or
2115 correct solution :-%
2116
2117 Reads are equally tricky due to a nasty characteristic of the NCR5380.
2118 If the chip is in DMA mode for an READ, it will respond to a target's
2119 REQ by latching the SCSI data into the INPUT DATA register and asserting
2120 ACK, even if it has _already_ been notified by the DMA controller that
2121 the current DMA transfer has completed! If the NCR5380 is then taken
2122 out of DMA mode, this already-acknowledged byte is lost.
2123
2124 This is not a problem for "one DMA transfer per command" reads, because
2125 the situation will never arise... either all of the data is DMA'ed
2126 properly, or the target switches to MESSAGE IN phase to signal a
2127 disconnection (either operation bringing the DMA to a clean halt).
2128 However, in order to handle scatter-reads, we must work around the
2129 problem. The chosen fix is to DMA N-2 bytes, then check for the
2130 condition before taking the NCR5380 out of DMA mode. One or two extra
2131 bytes are transferred via PIO as necessary to fill out the original
2132 request.
2133*/
2134
2135 if (p & SR_IO0x04) {
2136#ifdef READ_OVERRUNS
2137 udelay(10)(__builtin_constant_p(10) ? __const_udelay((10) * 0x10c6ul) :
__udelay(10));
2138 if (((NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & (BASR_PHASE_MATCH0x08|BASR_ACK0x01)) ==
2139 (BASR_PHASE_MATCH0x08 | BASR_ACK0x01))) {
2140 saved_data = NCR5380_read(INPUT_DATA_REGISTER)( ((__builtin_constant_p((( io_port + pas16_offset[(INPUT_DATA_REGISTER
)] ))) && (( io_port + pas16_offset[(INPUT_DATA_REGISTER
)] )) < 256) ? __inbc(( io_port + pas16_offset[(INPUT_DATA_REGISTER
)] )) : __inb(( io_port + pas16_offset[(INPUT_DATA_REGISTER)]
))) );
2141 overrun = 1;
2142 }
2143#endif
2144 } else {
2145 int limit = 100;
2146 while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) )) & BASR_ACK0x01) ||
2147 (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20)) {
2148 if (!(tmp & BASR_PHASE_MATCH0x08)) break;
2149 if (--limit < 0) break;
2150 }
2151 }
2152
2153
2154#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_DMA0x4)
2155 printk("scsi%d : polled DMA transfer complete, basr 0x%X, sr 0x%X\n",
2156 instance->host_no, tmp, NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ));
2157#endif
2158
2159 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
2160 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2161
2162 residue = NCR5380_dma_residual(instance);
2163 c -= residue;
2164 *count -= c;
2165 *data += c;
2166 *phase = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & PHASE_MASK(0x10 | 0x08 | 0x04);
2167
2168#ifdef READ_OVERRUNS
2169 if (*phase == p && (p & SR_IO0x04) && residue == 0) {
2170 if (overrun) {
2171#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_DMA0x4)
2172 printk("Got an input overrun, using saved byte\n");
2173#endif
2174 **data = saved_data;
2175 *data += 1;
2176 *count -= 1;
2177 cnt = toPIO = 1;
2178 } else {
2179 printk("No overrun??\n");
2180 cnt = toPIO = 2;
2181 }
2182#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_DMA0x4)
2183 printk("Doing %d-byte PIO to 0x%X\n", cnt, *data);
2184#endif
2185 NCR5380_transfer_pio(instance, phase, &cnt, data);
2186 *count -= toPIO - cnt;
2187 }
2188#endif
2189
2190#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_DMA0x4)
2191 printk("Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n",
2192 *data, *count, *(*data+*count-1), *(*data+*count));
2193#endif
2194 return 0;
2195
2196#elif defined(REAL_DMA)
2197 return 0;
2198#else /* defined(REAL_DMA_POLL) */
2199 if (p & SR_IO0x04) {
2200#ifdef DMA_WORKS_RIGHT
2201 foo = NCR5380_pread(instance, d, c);
2202#else
2203 int diff = 1;
2204 if (hostdata->flags & FLAG_NCR53C4004) {
2205 diff=0;
2206 }
2207
2208 if (!(foo = NCR5380_pread(instance, d, c - diff))) {
2209 /*
2210 * We can't disable DMA mode after successfully transferring
2211 * what we plan to be the last byte, since that would open up
2212 * a race condition where if the target asserted REQ before
2213 * we got the DMA mode reset, the NCR5380 would have latched
2214 * an additional byte into the INPUT DATA register and we'd
2215 * have dropped it.
2216 *
2217 * The workaround was to transfer one fewer bytes than we
2218 * intended to with the pseudo-DMA read function, wait for
2219 * the chip to latch the last byte, read it, and then disable
2220 * pseudo-DMA mode.
2221 *
2222 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
2223 * REQ is deasserted when ACK is asserted, and not reasserted
2224 * until ACK goes false. Since the NCR5380 won't lower ACK
2225 * until DACK is asserted, which won't happen unless we twiddle
2226 * the DMA port or we take the NCR5380 out of DMA mode, we
2227 * can guarantee that we won't handshake another extra
2228 * byte.
2229 */
2230
2231 if (!(hostdata->flags & FLAG_NCR53C4004)) {
2232 while (!(NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & BASR_DRQ0x40));
2233 /* Wait for clean handshake */
2234 while (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20);
2235 d[c - 1] = NCR5380_read(INPUT_DATA_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(6)] ))) &&
(( io_port + pas16_offset[(6)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(6)] )) : __inb(( io_port + pas16_offset[(6)]
))) );
2236 }
2237 }
2238#endif
2239 } else {
2240#ifdef DMA_WORKS_RIGHT
2241 foo = NCR5380_pwrite(instance, d, c);
2242#else
2243 int timeout;
2244#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_C400_PWRITE0x200000)
2245 printk("About to pwrite %d bytes\n", c);
2246#endif
2247 if (!(foo = NCR5380_pwrite(instance, d, c))) {
2248 /*
2249 * Wait for the last byte to be sent. If REQ is being asserted for
2250 * the byte we're interested, we'll ACK it and it will go false.
2251 */
2252 if (!(hostdata->flags & FLAG_HAS_LAST_BYTE_SENT1)) {
2253 timeout = 20000;
Value stored to 'timeout' is never read
2254#if 1
2255#if 1
2256 while (!(NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) &
2257 BASR_DRQ0x40) && (NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) &
2258 BASR_PHASE_MATCH0x08));
2259#else
2260 if (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20) {
2261 for (; timeout &&
2262 !(NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & BASR_ACK0x01);
2263 --timeout);
2264 for (; timeout && (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20);
2265 --timeout);
2266 }
2267#endif
2268
2269
2270#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LAST_BYTE_SENT0x20000)
2271 if (!timeout)
2272 printk("scsi%d : timed out on last byte\n",
2273 instance->host_no);
2274#endif
2275
2276
2277 if (hostdata->flags & FLAG_CHECK_LAST_BYTE_SENT2) {
2278 hostdata->flags &= ~FLAG_CHECK_LAST_BYTE_SENT2;
2279 if (NCR5380_read(TARGET_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(3)] )) : __inb(( io_port + pas16_offset[(3)]
))) ) & TCR_LAST_BYTE_SENT0x80) {
2280 hostdata->flags |= FLAG_HAS_LAST_BYTE_SENT1;
2281#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LAST_BYTE_SENT0x20000)
2282 printk("scsi%d : last bit sent works\n",
2283 instance->host_no);
2284#endif
2285 }
2286 }
2287 } else {
2288#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_C400_PWRITE0x200000)
2289 printk("Waiting for LASTBYTE\n");
2290#endif
2291 while (!(NCR5380_read(TARGET_COMMAND_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(3)] )) : __inb(( io_port + pas16_offset[(3)]
))) ) & TCR_LAST_BYTE_SENT0x80));
2292#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_C400_PWRITE0x200000)
2293 printk("Got LASTBYTE\n");
2294#endif
2295 }
2296#else
2297 udelay (5)(__builtin_constant_p(5) ? __const_udelay((5) * 0x10c6ul) : __udelay
(5));
2298#endif
2299 }
2300#endif
2301 }
2302
2303 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
2304 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2305
2306 if ((!(p & SR_IO0x04)) && (hostdata->flags & FLAG_NCR53C4004)) {
2307#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_C400_PWRITE0x200000)
2308 printk("53C400w: Checking for IRQ\n");
2309#endif
2310 if (NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & BASR_IRQ0x10) {
2311#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_C400_PWRITE0x200000)
2312 printk("53C400w: got it, reading reset interrupt reg\n");
2313#endif
2314 NCR5380_read(RESET_PARITY_INTERRUPT_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(7)] ))) &&
(( io_port + pas16_offset[(7)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(7)] )) : __inb(( io_port + pas16_offset[(7)]
))) );
2315 } else {
2316 printk("53C400w: IRQ NOT THERE!\n");
2317 }
2318 }
2319
2320 *data = d + c;
2321 *count = 0;
2322 *phase = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & PHASE_MASK(0x10 | 0x08 | 0x04);
2323#if 0
2324 NCR5380_print_phase(instance);
2325#endif
2326#if defined(PSEUDO_DMA) && !defined(UNSAFE)
2327 sti()__asm__ __volatile__ ("sti": : :"memory");
2328#endif /* defined(REAL_DMA_POLL) */
2329 return foo;
2330#endif /* def REAL_DMA */
2331}
2332#endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */
2333
2334/*
2335 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
2336 *
2337 * Purpose : run through the various SCSI phases and do as the target
2338 * directs us to. Operates on the currently connected command,
2339 * instance->connected.
2340 *
2341 * Inputs : instance, instance for which we are doing commands
2342 *
2343 * Side effects : SCSI things happen, the disconnected queue will be
2344 * modified if a command disconnects, *instance->connected will
2345 * change.
2346 *
2347 * XXX Note : we need to watch for bus free or a reset condition here
2348 * to recover from an unexpected bus free condition.
2349 */
2350
2351static void NCR5380_information_transfer (struct Scsi_Host *instance) {
2352 NCR5380_local_declare()volatile unsigned short io_port;
2353 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
2354 instance->hostdata;
2355 unsigned char msgout = NOP0x08;
2356 int sink = 0;
2357 int len;
2358#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
2359 int transfersize;
2360#endif
2361 unsigned char *data;
2362 unsigned char phase, tmp, extended_msg[10], old_phase=0xff;
2363 Scsi_Cmnd *cmd = (Scsi_Cmnd *) hostdata->connected;
2364 NCR5380_setup(instance)io_port = (instance)->io_port;
2365
2366 while (1) {
2367 tmp = NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) );
2368 /* We only have a valid SCSI phase when REQ is asserted */
2369 if (tmp & SR_REQ0x20) {
2370 phase = (tmp & PHASE_MASK(0x10 | 0x08 | 0x04));
2371 if (phase != old_phase) {
2372 old_phase = phase;
2373#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INFORMATION0x10)
2374 NCR5380_print_phase(instance);
2375#endif
2376 }
2377
2378 if (sink && (phase != PHASE_MSGOUT(0x10 | 0x08))) {
2379 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp))( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((((tmp
) >> 2))),(( io_port + pas16_offset[(3)] ))) : __outb((
(((tmp) >> 2))),(( io_port + pas16_offset[(3)] )))) );
2380
2381 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] )))) )
2382 ICR_ASSERT_ACK)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02
| 0x10)),(( io_port + pas16_offset[(1)] )))) );
2383 while (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20);
2384 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) )
2385 ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
2386 sink = 0;
2387 continue;
2388 }
2389
2390 switch (phase) {
2391 case PHASE_DATAIN0x04:
2392 case PHASE_DATAOUT0:
2393#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_NO_DATAOUT0x200)
2394 printk("scsi%d : NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n",
2395 instance->host_no);
2396 sink = 1;
2397 do_abort(instance);
2398 cmd->result = DID_ERROR0x07 << 16;
2399 cmd->done(cmd);
2400 return;
2401#endif
2402 /*
2403 * If there is no room left in the current buffer in the
2404 * scatter-gather list, move onto the next one.
2405 */
2406
2407 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
2408 ++cmd->SCp.buffer;
2409 --cmd->SCp.buffers_residual;
2410 cmd->SCp.this_residual = cmd->SCp.buffer->length;
2411 cmd->SCp.ptr = cmd->SCp.buffer->address;
2412#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_INFORMATION0x10)
2413 printk("scsi%d : %d bytes and %d buffers left\n",
2414 instance->host_no, cmd->SCp.this_residual,
2415 cmd->SCp.buffers_residual);
2416#endif
2417 }
2418
2419 /*
2420 * The preferred transfer method is going to be
2421 * PSEUDO-DMA for systems that are strictly PIO,
2422 * since we can let the hardware do the handshaking.
2423 *
2424 * For this to work, we need to know the transfersize
2425 * ahead of time, since the pseudo-DMA code will sit
2426 * in an unconditional loop.
2427 */
2428
2429#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
2430 /* KLL
2431 * PSEUDO_DMA is defined here. If this is the g_NCR5380
2432 * driver then it will always be defined, so the
2433 * FLAG_NO_PSEUDO_DMA is used to inhibit PDMA in the base
2434 * NCR5380 case. I think this is a fairly clean solution.
2435 * We supplement these 2 if's with the flag.
2436 */
2437#ifdef NCR5380_dma_xfer_len
2438 if (!cmd->device->borken &&
2439 !(hostdata->flags & FLAG_NO_PSEUDO_DMA8) &&
2440 (transfersize = NCR5380_dma_xfer_len(instance, cmd)) != 0) {
2441#else
2442 transfersize = cmd->transfersize;
2443
2444#ifdef LIMIT_TRANSFERSIZE /* If we have problems with interrupt service */
2445 if( transfersize > 512 )
2446 transfersize = 512;
2447#endif /* LIMIT_TRANSFERSIZE */
2448
2449 if (!cmd->device->borken && transfersize &&
2450 !(hostdata->flags & FLAG_NO_PSEUDO_DMA8) &&
2451 cmd->SCp.this_residual && !(cmd->SCp.this_residual %
2452 transfersize)) {
2453 /* Limit transfers to 32K, for xx400 & xx406
2454 * pseudoDMA that transfers in 128 bytes blocks. */
2455 if (transfersize > 32*1024)
2456 transfersize = 32*1024;
2457#endif
2458 len = transfersize;
2459 if (NCR5380_transfer_dma(instance, &phase,
2460 &len, (unsigned char **) &cmd->SCp.ptr)) {
2461 /*
2462 * If the watchdog timer fires, all future accesses to this
2463 * device will use the polled-IO.
2464 */
2465 printk("scsi%d : switching target %d lun %d to slow handshake\n",
2466 instance->host_no, cmd->target, cmd->lun);
2467 cmd->device->borken = 1;
2468 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) )
2469 ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
2470 sink = 1;
2471 do_abort(instance);
2472 cmd->result = DID_ERROR0x07 << 16;
2473 cmd->done(cmd);
2474 /* XXX - need to source or sink data here, as appropriate */
2475 } else
2476 cmd->SCp.this_residual -= transfersize - len;
2477 } else
2478#endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */
2479 NCR5380_transfer_pio(instance, &phase,
2480 (int *) &cmd->SCp.this_residual, (unsigned char **)
2481 &cmd->SCp.ptr);
2482 break;
2483 case PHASE_MSGIN(0x10 | 0x08 | 0x04):
2484 len = 1;
2485 data = &tmp;
2486 NCR5380_transfer_pio(instance, &phase, &len, &data);
2487 cmd->SCp.Message = tmp;
2488
2489 switch (tmp) {
2490 /*
2491 * Linking lets us reduce the time required to get the
2492 * next command out to the device, hopefully this will
2493 * mean we don't waste another revolution due to the delays
2494 * required by ARBITRATION and another SELECTION.
2495 *
2496 * In the current implementation proposal, low level drivers
2497 * merely have to start the next command, pointed to by
2498 * next_link, done() is called as with unlinked commands.
2499 */
2500#ifdef LINKED
2501 case LINKED_CMD_COMPLETE0x0a:
2502 case LINKED_FLG_CMD_COMPLETE0x0b:
2503 /* Accept message by clearing ACK */
2504 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2505
2506#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LINKED0x80)
2507 printk("scsi%d : target %d lun %d linked command complete.\n",
2508 instance->host_no, cmd->target, cmd->lun);
2509#endif
2510 /*
2511 * Sanity check : A linked command should only terminate with
2512 * one of these messages if there are more linked commands
2513 * available.
2514 */
2515
2516 if (!cmd->next_link) {
2517 printk("scsi%d : target %d lun %d linked command complete, no next_link\n"
2518 instance->host_no, cmd->target, cmd->lun);
2519 sink = 1;
2520 do_abort (instance);
2521 return;
2522 }
2523
2524 initialize_SCp(cmd->next_link);
2525 /* The next command is still part of this process */
2526 cmd->next_link->tag = cmd->tag;
2527 cmd->result = cmd->SCp.Status | (cmd->SCp.Message << 8);
2528#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_LINKED0x80)
2529 printk("scsi%d : target %d lun %d linked request done, calling scsi_done().\n",
2530 instance->host_no, cmd->target, cmd->lun);
2531#endif
2532#ifdef NCR5380_STATS
2533 collect_stats(hostdata, cmd);
2534#endif
2535 cmd->scsi_done(cmd);
2536 cmd = hostdata->connected;
2537 break;
2538#endif /* def LINKED */
2539 case ABORT0x06:
2540 case COMMAND_COMPLETE0x00:
2541 /* Accept message by clearing ACK */
2542 sink = 1;
2543 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2544 hostdata->connected = NULL((void *) 0);
2545#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_QUEUES0x2000)
2546 printk("scsi%d : command for target %d, lun %d completed\n",
2547 instance->host_no, cmd->target, cmd->lun);
2548#endif
2549 hostdata->busy[cmd->target] &= ~(1 << cmd->lun);
2550
2551 /*
2552 * I'm not sure what the correct thing to do here is :
2553 *
2554 * If the command that just executed is NOT a request
2555 * sense, the obvious thing to do is to set the result
2556 * code to the values of the stored parameters.
2557 *
2558 * If it was a REQUEST SENSE command, we need some way
2559 * to differentiate between the failure code of the original
2560 * and the failure code of the REQUEST sense - the obvious
2561 * case is success, where we fall through and leave the result
2562 * code unchanged.
2563 *
2564 * The non-obvious place is where the REQUEST SENSE failed
2565 */
2566
2567 if (cmd->cmnd[0] != REQUEST_SENSE0x03)
2568 cmd->result = cmd->SCp.Status | (cmd->SCp.Message << 8);
2569 else if (cmd->SCp.Status != GOOD0x00)
2570 cmd->result = (cmd->result & 0x00ffff) | (DID_ERROR0x07 << 16);
2571
2572#ifdef AUTOSENSE
2573 if ((cmd->cmnd[0] != REQUEST_SENSE0x03) &&
2574 (cmd->SCp.Status == CHECK_CONDITION0x01)) {
2575#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_AUTOSENSE0x2)
2576 printk("scsi%d : performing request sense\n",
2577 instance->host_no);
2578#endif
2579 cmd->cmnd[0] = REQUEST_SENSE0x03;
2580 cmd->cmnd[1] &= 0xe0;
2581 cmd->cmnd[2] = 0;
2582 cmd->cmnd[3] = 0;
2583 cmd->cmnd[4] = sizeof(cmd->sense_buffer);
2584 cmd->cmnd[5] = 0;
2585
2586 cmd->SCp.buffer = NULL((void *) 0);
2587 cmd->SCp.buffers_residual = 0;
2588 cmd->SCp.ptr = (char *) cmd->sense_buffer;
2589 cmd->SCp.this_residual = sizeof(cmd->sense_buffer);
2590
2591 cli()__asm__ __volatile__ ("cli": : :"memory");
2592 LIST(cmd,hostdata->issue_queue);
2593 cmd->host_scribble = (unsigned char *)
2594 hostdata->issue_queue;
2595 hostdata->issue_queue = (Scsi_Cmnd *) cmd;
2596 sti()__asm__ __volatile__ ("sti": : :"memory");
2597#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_QUEUES0x2000)
2598 printk("scsi%d : REQUEST SENSE added to head of issue queue\n",instance->host_no);
2599#endif
2600 } else {
2601#endif /* def AUTOSENSE */
2602#ifdef NCR5380_STATS
2603 collect_stats(hostdata, cmd);
2604#endif
2605 cmd->scsi_done(cmd);
2606 }
2607
2608 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
2609 /*
2610 * Restore phase bits to 0 so an interrupted selection,
2611 * arbitration can resume.
2612 */
2613 NCR5380_write(TARGET_COMMAND_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(3)] ))) : __outb(((0)),(( io_port +
pas16_offset[(3)] )))) );
2614
2615 while ((NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_BSY0x40) && !hostdata->connected)
2616 barrier()__asm__ __volatile__("": : :"memory");
2617 return;
2618 case MESSAGE_REJECT0x07:
2619 /* Accept message by clearing ACK */
2620 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2621 switch (hostdata->last_message) {
2622 case HEAD_OF_QUEUE_TAG0x21:
2623 case ORDERED_QUEUE_TAG0x22:
2624 case SIMPLE_QUEUE_TAG0x20:
2625 cmd->device->tagged_queue = 0;
2626 hostdata->busy[cmd->target] |= (1 << cmd->lun);
2627 break;
2628 default:
2629 break;
2630 }
2631 case DISCONNECT0x04:
2632 /* Accept message by clearing ACK */
2633 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2634 cmd->device->disconnect = 1;
2635 cli()__asm__ __volatile__ ("cli": : :"memory");
2636 LIST(cmd,hostdata->disconnected_queue);
2637 cmd->host_scribble = (unsigned char *)
2638 hostdata->disconnected_queue;
2639 hostdata->connected = NULL((void *) 0);
2640 hostdata->disconnected_queue = cmd;
2641 sti()__asm__ __volatile__ ("sti": : :"memory");
2642#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_QUEUES0x2000)
2643 printk("scsi%d : command for target %d lun %d was moved from connected to"
2644 " the disconnected_queue\n", instance->host_no,
2645 cmd->target, cmd->lun);
2646#endif
2647 /*
2648 * Restore phase bits to 0 so an interrupted selection,
2649 * arbitration can resume.
2650 */
2651 NCR5380_write(TARGET_COMMAND_REG, 0)( ((__builtin_constant_p((( io_port + pas16_offset[(3)] ))) &&
(( io_port + pas16_offset[(3)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(3)] ))) : __outb(((0)),(( io_port +
pas16_offset[(3)] )))) );
2652
2653 /* Enable reselect interrupts */
2654 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
2655 /* Wait for bus free to avoid nasty timeouts */
2656 while ((NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_BSY0x40) && !hostdata->connected)
2657 barrier()__asm__ __volatile__("": : :"memory");
2658#if 0
2659 NCR5380_print_status(instance);
2660#endif
2661 return;
2662 /*
2663 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
2664 * operation, in violation of the SCSI spec so we can safely
2665 * ignore SAVE/RESTORE pointers calls.
2666 *
2667 * Unfortunately, some disks violate the SCSI spec and
2668 * don't issue the required SAVE_POINTERS message before
2669 * disconnecting, and we have to break spec to remain
2670 * compatible.
2671 */
2672 case SAVE_POINTERS0x02:
2673 case RESTORE_POINTERS0x03:
2674 /* Accept message by clearing ACK */
2675 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2676 break;
2677 case EXTENDED_MESSAGE0x01:
2678/*
2679 * Extended messages are sent in the following format :
2680 * Byte
2681 * 0 EXTENDED_MESSAGE == 1
2682 * 1 length (includes one byte for code, doesn't
2683 * include first two bytes)
2684 * 2 code
2685 * 3..length+1 arguments
2686 *
2687 * Start the extended message buffer with the EXTENDED_MESSAGE
2688 * byte, since print_msg() wants the whole thing.
2689 */
2690 extended_msg[0] = EXTENDED_MESSAGE0x01;
2691 /* Accept first byte by clearing ACK */
2692 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2693
2694#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_EXTENDED0x80000)
2695 printk("scsi%d : receiving extended message\n",
2696 instance->host_no);
2697#endif
2698
2699 len = 2;
2700 data = extended_msg + 1;
2701 phase = PHASE_MSGIN(0x10 | 0x08 | 0x04);
2702 NCR5380_transfer_pio(instance, &phase, &len, &data);
2703
2704#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_EXTENDED0x80000)
2705 printk("scsi%d : length=%d, code=0x%02x\n",
2706 instance->host_no, (int) extended_msg[1],
2707 (int) extended_msg[2]);
2708#endif
2709
2710 if (!len && extended_msg[1] <=
2711 (sizeof (extended_msg) - 1)) {
2712 /* Accept third byte by clearing ACK */
2713 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2714 len = extended_msg[1] - 1;
2715 data = extended_msg + 3;
2716 phase = PHASE_MSGIN(0x10 | 0x08 | 0x04);
2717
2718 NCR5380_transfer_pio(instance, &phase, &len, &data);
2719
2720#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_EXTENDED0x80000)
2721 printk("scsi%d : message received, residual %d\n",
2722 instance->host_no, len);
2723#endif
2724
2725 switch (extended_msg[2]) {
2726 case EXTENDED_SDTR0x01:
2727 case EXTENDED_WDTR0x03:
2728 case EXTENDED_MODIFY_DATA_POINTER0x00:
2729 case EXTENDED_EXTENDED_IDENTIFY0x02:
2730 tmp = 0;
2731 }
2732 } else if (len) {
2733 printk("scsi%d: error receiving extended message\n",
2734 instance->host_no);
2735 tmp = 0;
2736 } else {
2737 printk("scsi%d: extended message code %02x length %d is too long\n",
2738 instance->host_no, extended_msg[2], extended_msg[1]);
2739 tmp = 0;
2740 }
2741 /* Fall through to reject message */
2742
2743 /*
2744 * If we get something weird that we aren't expecting,
2745 * reject it.
2746 */
2747 default:
2748 if (!tmp) {
2749 printk("scsi%d: rejecting message ", instance->host_no);
2750 print_msg (extended_msg);
2751 printk("\n");
2752 } else if (tmp != EXTENDED_MESSAGE0x01)
2753 printk("scsi%d: rejecting unknown message %02x from target %d, lun %d\n",
2754 instance->host_no, tmp, cmd->target, cmd->lun);
2755 else
2756 printk("scsi%d: rejecting unknown extended message code %02x, length %d from target %d, lun %d\n",
2757 instance->host_no, extended_msg[1], extended_msg[0], cmd->target, cmd->lun);
2758
2759 msgout = MESSAGE_REJECT0x07;
2760 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) )
2761 ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x02)),(
( io_port + pas16_offset[(1)] )))) );
2762 break;
2763 } /* switch (tmp) */
2764 break;
2765 case PHASE_MSGOUT(0x10 | 0x08):
2766 len = 1;
2767 data = &msgout;
2768 hostdata->last_message = msgout;
2769 NCR5380_transfer_pio(instance, &phase, &len, &data);
2770 if (msgout == ABORT0x06) {
2771 hostdata->busy[cmd->target] &= ~(1 << cmd->lun);
2772 hostdata->connected = NULL((void *) 0);
2773 cmd->result = DID_ERROR0x07 << 16;
2774#ifdef NCR5380_STATS
2775 collect_stats(hostdata, cmd);
2776#endif
2777 cmd->scsi_done(cmd);
2778 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __outbc(((hostdata
->id_mask)),(( io_port + pas16_offset[(4)] ))) : __outb(((
hostdata->id_mask)),(( io_port + pas16_offset[(4)] )))) );
2779 return;
2780 }
2781 msgout = NOP0x08;
2782 break;
2783 case PHASE_CMDOUT0x08:
2784 len = cmd->cmd_len;
2785 data = cmd->cmnd;
2786 /*
2787 * XXX for performance reasons, on machines with a
2788 * PSEUDO-DMA architecture we should probably
2789 * use the dma transfer function.
2790 */
2791 NCR5380_transfer_pio(instance, &phase, &len,
2792 &data);
2793#ifdef USLEEP
2794 if (!disconnect && should_disconnect(cmd->cmnd[0])) {
2795 hostdata->time_expires = jiffies + USLEEP_SLEEP;
2796#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_USLEEP0x10000)
2797 printk("scsi%d : issued command, sleeping until %ul\n", instance->host_no,
2798 hostdata->time_expires);
2799#endif
2800 NCR5380_set_timer (instance);
2801 return;
2802 }
2803#endif /* def USLEEP */
2804 break;
2805 case PHASE_STATIN(0x08 | 0x04):
2806 len = 1;
2807 data = &tmp;
2808 NCR5380_transfer_pio(instance, &phase, &len, &data);
2809 cmd->SCp.Status = tmp;
2810 break;
2811 default:
2812 printk("scsi%d : unknown phase\n", instance->host_no);
2813#ifdef NDEBUG(0x40000 | NDEBUG_ABORT)
2814 NCR5380_print(instance);
2815#endif
2816 } /* switch(phase) */
2817 } /* if (tmp * SR_REQ) */
2818#ifdef USLEEP
2819 else {
2820 if (!disconnect && hostdata->time_expires && jiffies >
2821 hostdata->time_expires) {
2822 hostdata->time_expires = jiffies + USLEEP_SLEEP;
2823#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_USLEEP0x10000)
2824 printk("scsi%d : poll timed out, sleeping until %ul\n", instance->host_no,
2825 hostdata->time_expires);
2826#endif
2827 NCR5380_set_timer (instance);
2828 return;
2829 }
2830 }
2831#endif
2832 } /* while (1) */
2833}
2834
2835/*
2836 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2837 *
2838 * Purpose : does reselection, initializing the instance->connected
2839 * field to point to the Scsi_Cmnd for which the I_T_L or I_T_L_Q
2840 * nexus has been reestablished,
2841 *
2842 * Inputs : instance - this instance of the NCR5380.
2843 *
2844 */
2845
2846
2847static void NCR5380_reselect (struct Scsi_Host *instance) {
2848 NCR5380_local_declare()volatile unsigned short io_port;
2849 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
2850 instance->hostdata;
2851 unsigned char target_mask;
2852 unsigned char lun, phase;
2853 int len;
2854#ifdef SCSI2
2855 unsigned char tag;
2856#endif
2857 unsigned char msg[3];
2858 unsigned char *data;
2859 Scsi_Cmnd *tmp = NULL((void *) 0), *prev;
2860 int abort = 0;
2861 NCR5380_setup(instance)io_port = (instance)->io_port;
2862
2863 /*
2864 * Disable arbitration, etc. since the host adapter obviously
2865 * lost, and tell an interrupted NCR5380_select() to restart.
2866 */
2867
2868 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
2869 hostdata->restart_select = 1;
2870
2871 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(0)] ))) &&
(( io_port + pas16_offset[(0)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(0)] )) : __inb(( io_port + pas16_offset[(0)]
))) ) & ~(hostdata->id_mask);
2872
2873#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_RESELECTION0x4000)
2874 printk("scsi%d : reselect\n", instance->host_no);
2875#endif
2876
2877 /*
2878 * At this point, we have detected that our SCSI ID is on the bus,
2879 * SEL is true and BSY was false for at least one bus settle delay
2880 * (400 ns).
2881 *
2882 * We must assert BSY ourselves, until the target drops the SEL
2883 * signal.
2884 */
2885
2886 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0 | 0x08
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0 | 0x08)),(
( io_port + pas16_offset[(1)] )))) );
2887
2888 while (NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_SEL0x02);
2889 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2890
2891 /*
2892 * Wait for target to go into MSGIN.
2893 */
2894
2895 while (!(NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ) & SR_REQ0x20));
2896
2897 len = 1;
2898 data = msg;
2899 phase = PHASE_MSGIN(0x10 | 0x08 | 0x04);
2900 NCR5380_transfer_pio(instance, &phase, &len, &data);
2901
2902
2903 if (!(msg[0] & 0x80)) {
2904 printk("scsi%d : expecting IDENTIFY message, got ",
2905 instance->host_no);
2906 print_msg(msg);
2907 abort = 1;
2908 } else {
2909 /* Accept message by clearing ACK */
2910 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
2911 lun = (msg[0] & 0x07);
2912
2913 /*
2914 * We need to add code for SCSI-II to track which devices have
2915 * I_T_L_Q nexuses established, and which have simple I_T_L
2916 * nexuses so we can chose to do additional data transfer.
2917 */
2918
2919#ifdef SCSI2
2920#error "SCSI-II tagged queueing is not supported yet"
2921#endif
2922
2923 /*
2924 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2925 * just reestablished, and remove it from the disconnected queue.
2926 */
2927
2928
2929 for (tmp = (Scsi_Cmnd *) hostdata->disconnected_queue, prev = NULL((void *) 0);
2930 tmp; prev = tmp, tmp = (Scsi_Cmnd *) tmp->host_scribble)
2931 if ((target_mask == (1 << tmp->target)) && (lun == tmp->lun)
2932#ifdef SCSI2
2933 && (tag == tmp->tag)
2934#endif
2935) {
2936 if (prev) {
2937 REMOVE(prev,prev->host_scribble,tmp,tmp->host_scribble);
2938 prev->host_scribble = tmp->host_scribble;
2939 } else {
2940 REMOVE(-1,hostdata->disconnected_queue,tmp,tmp->host_scribble);
2941 hostdata->disconnected_queue = (Scsi_Cmnd *) tmp->host_scribble;
2942 }
2943 tmp->host_scribble = NULL((void *) 0);
2944 break;
2945 }
2946
2947 if (!tmp) {
2948#ifdef SCSI2
2949 printk("scsi%d : warning : target bitmask %02x lun %d tag %d not in disconnect_queue.\n",
2950 instance->host_no, target_mask, lun, tag);
2951#else
2952 printk("scsi%d : warning : target bitmask %02x lun %d not in disconnect_queue.\n",
2953 instance->host_no, target_mask, lun);
2954#endif
2955 /*
2956 * Since we have an established nexus that we can't do anything with,
2957 * we must abort it.
2958 */
2959 abort = 1;
2960 }
2961 }
2962
2963 if (abort) {
2964 do_abort (instance);
2965 } else {
2966 hostdata->connected = tmp;
2967#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_RESELECTION0x4000)
2968 printk("scsi%d : nexus established, target = %d, lun = %d, tag = %d\n",
2969 instance->host_no, tmp->target, tmp->lun, tmp->tag);
2970#endif
2971 }
2972}
2973
2974/*
2975 * Function : void NCR5380_dma_complete (struct Scsi_Host *instance)
2976 *
2977 * Purpose : called by interrupt handler when DMA finishes or a phase
2978 * mismatch occurs (which would finish the DMA transfer).
2979 *
2980 * Inputs : instance - this instance of the NCR5380.
2981 *
2982 * Returns : pointer to the Scsi_Cmnd structure for which the I_T_L
2983 * nexus has been reestablished, on failure NULL is returned.
2984 */
2985
2986#ifdef REAL_DMA
2987static void NCR5380_dma_complete (NCR5380_instance *instance) {
2988 NCR5380_local_declare()volatile unsigned short io_port;
2989 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *
2990 instance->hostdata);
2991 int transferred;
2992 NCR5380_setup(instance)io_port = (instance)->io_port;
2993
2994 /*
2995 * XXX this might not be right.
2996 *
2997 * Wait for final byte to transfer, ie wait for ACK to go false.
2998 *
2999 * We should use the Last Byte Sent bit, unfortunately this is
3000 * not available on the 5380/5381 (only the various CMOS chips)
3001 */
3002
3003 while (NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ) & BASR_ACK0x01);
3004
3005 NCR5380_write(MODE_REG, MR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(2)] ))) &&
(( io_port + pas16_offset[(2)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(2)] ))) : __outb(((0)),(( io_port +
pas16_offset[(2)] )))) );
3006 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0)),
(( io_port + pas16_offset[(1)] ))) : __outb(((0)),(( io_port +
pas16_offset[(1)] )))) );
3007
3008 /*
3009 * The only places we should see a phase mismatch and have to send
3010 * data from the same set of pointers will be the data transfer
3011 * phases. So, residual, requested length are only important here.
3012 */
3013
3014 if (!(hostdata->connected->SCp.phase & SR_CD0x08)) {
3015 transferred = instance->dmalen - NCR5380_dma_residual();
3016 hostdata->connected->SCp.this_residual -= transferred;
3017 hostdata->connected->SCp.ptr += transferred;
3018 }
3019}
3020#endif /* def REAL_DMA */
3021
3022/*
3023 * Function : int NCR5380_abort (Scsi_Cmnd *cmd)
3024 *
3025 * Purpose : abort a command
3026 *
3027 * Inputs : cmd - the Scsi_Cmnd to abort, code - code to set the
3028 * host byte of the result field to, if zero DID_ABORTED is
3029 * used.
3030 *
3031 * Returns : 0 - success, -1 on failure.
3032 *
3033 * XXX - there is no way to abort the command that is currently
3034 * connected, you have to wait for it to complete. If this is
3035 * a problem, we could implement longjmp() / setjmp(), setjmp()
3036 * called where the loop started in NCR5380_main().
3037 */
3038
3039#ifndef NCR5380_abortpas16_abort
3040static
3041#endif
3042int NCR5380_abortpas16_abort (Scsi_Cmnd *cmd) {
3043 NCR5380_local_declare()volatile unsigned short io_port;
3044 struct Scsi_Host *instance = cmd->host;
3045 struct NCR5380_hostdata *hostdata = (struct NCR5380_hostdata *)
3046 instance->hostdata;
3047 Scsi_Cmnd *tmp, **prev;
3048
3049 printk("scsi%d : aborting command\n", instance->host_no);
3050 print_Scsi_Cmnd (cmd);
3051
3052 NCR5380_print_status (instance);
3053
3054 printk("scsi%d : aborting command\n", instance->host_no);
3055 print_Scsi_Cmnd (cmd);
3056
3057 NCR5380_print_status (instance);
3058
3059 cli()__asm__ __volatile__ ("cli": : :"memory");
3060 NCR5380_setup(instance)io_port = (instance)->io_port;
3061
3062#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3063 printk("scsi%d : abort called\n", instance->host_no);
3064 printk(" basr 0x%X, sr 0x%X\n",
3065 NCR5380_read(BUS_AND_STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(5)] ))) &&
(( io_port + pas16_offset[(5)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(5)] )) : __inb(( io_port + pas16_offset[(5)]
))) ), NCR5380_read(STATUS_REG)( ((__builtin_constant_p((( io_port + pas16_offset[(4)] ))) &&
(( io_port + pas16_offset[(4)] )) < 256) ? __inbc(( io_port
+ pas16_offset[(4)] )) : __inb(( io_port + pas16_offset[(4)]
))) ));
3066#endif
3067
3068#if 0
3069/*
3070 * Case 1 : If the command is the currently executing command,
3071 * we'll set the aborted flag and return control so that
3072 * information transfer routine can exit cleanly.
3073 */
3074
3075 if (hostdata->connected == cmd) {
3076#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3077 printk("scsi%d : aborting connected command\n", instance->host_no);
3078#endif
3079 hostdata->aborted = 1;
3080/*
3081 * We should perform BSY checking, and make sure we haven't slipped
3082 * into BUS FREE.
3083 */
3084
3085 NCR5380_write(INITIATOR_COMMAND_REG, ICR_ASSERT_ATN)( ((__builtin_constant_p((( io_port + pas16_offset[(1)] ))) &&
(( io_port + pas16_offset[(1)] )) < 256) ? __outbc(((0x02
)),(( io_port + pas16_offset[(1)] ))) : __outb(((0x02)),(( io_port
+ pas16_offset[(1)] )))) );
3086/*
3087 * Since we can't change phases until we've completed the current
3088 * handshake, we have to source or sink a byte of data if the current
3089 * phase is not MSGOUT.
3090 */
3091
3092/*
3093 * Return control to the executing NCR drive so we can clear the
3094 * aborted flag and get back into our main loop.
3095 */
3096
3097 return 0;
3098 }
3099#endif
3100
3101/*
3102 * Case 2 : If the command hasn't been issued yet, we simply remove it
3103 * from the issue queue.
3104 */
3105#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3106 /* KLL */
3107 printk("scsi%d : abort going into loop.\n", instance->host_no);
3108#endif
3109 for (prev = (Scsi_Cmnd **) &(hostdata->issue_queue),
3110 tmp = (Scsi_Cmnd *) hostdata->issue_queue;
3111 tmp; prev = (Scsi_Cmnd **) &(tmp->host_scribble), tmp =
3112 (Scsi_Cmnd *) tmp->host_scribble)
3113 if (cmd == tmp) {
3114 REMOVE(5,*prev,tmp,tmp->host_scribble);
3115 (*prev) = (Scsi_Cmnd *) tmp->host_scribble;
3116 tmp->host_scribble = NULL((void *) 0);
3117 tmp->result = DID_ABORT0x05 << 16;
3118 sti()__asm__ __volatile__ ("sti": : :"memory");
3119#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3120 printk("scsi%d : abort removed command from issue queue.\n",
3121 instance->host_no);
3122#endif
3123 tmp->done(tmp);
3124 return SCSI_ABORT_SUCCESS1;
3125 }
3126#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3127 /* KLL */
3128 else if (prev == tmp) printk("scsi%d : LOOP\n", instance->host_no);
3129#endif
3130
3131/*
3132 * Case 3 : If any commands are connected, we're going to fail the abort
3133 * and let the high level SCSI driver retry at a later time or
3134 * issue a reset.
3135 *
3136 * Timeouts, and therefore aborted commands, will be highly unlikely
3137 * and handling them cleanly in this situation would make the common
3138 * case of noresets less efficient, and would pollute our code. So,
3139 * we fail.
3140 */
3141
3142 if (hostdata->connected) {
3143 sti()__asm__ __volatile__ ("sti": : :"memory");
3144#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3145 printk("scsi%d : abort failed, command connected.\n", instance->host_no);
3146#endif
3147 return SCSI_ABORT_NOT_RUNNING4;
3148 }
3149
3150/*
3151 * Case 4: If the command is currently disconnected from the bus, and
3152 * there are no connected commands, we reconnect the I_T_L or
3153 * I_T_L_Q nexus associated with it, go into message out, and send
3154 * an abort message.
3155 *
3156 * This case is especially ugly. In order to reestablish the nexus, we
3157 * need to call NCR5380_select(). The easiest way to implement this
3158 * function was to abort if the bus was busy, and let the interrupt
3159 * handler triggered on the SEL for reselect take care of lost arbitrations
3160 * where necessary, meaning interrupts need to be enabled.
3161 *
3162 * When interrupts are enabled, the queues may change - so we
3163 * can't remove it from the disconnected queue before selecting it
3164 * because that could cause a failure in hashing the nexus if that
3165 * device reselected.
3166 *
3167 * Since the queues may change, we can't use the pointers from when we
3168 * first locate it.
3169 *
3170 * So, we must first locate the command, and if NCR5380_select()
3171 * succeeds, then issue the abort, relocate the command and remove
3172 * it from the disconnected queue.
3173 */
3174
3175 for (tmp = (Scsi_Cmnd *) hostdata->disconnected_queue; tmp;
3176 tmp = (Scsi_Cmnd *) tmp->host_scribble)
3177 if (cmd == tmp) {
3178 sti()__asm__ __volatile__ ("sti": : :"memory");
3179#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3180 printk("scsi%d : aborting disconnected command.\n", instance->host_no);
3181#endif
3182
3183 if (NCR5380_select (instance, cmd, (int) cmd->tag))
3184 return SCSI_ABORT_BUSY3;
3185
3186#if (NDEBUG(0x40000 | NDEBUG_ABORT) & NDEBUG_ABORT)
3187 printk("scsi%d : nexus reestablished.\n", instance->host_no);
3188#endif
3189
3190 do_abort (instance);
3191
3192 cli()__asm__ __volatile__ ("cli": : :"memory");
3193 for (prev = (Scsi_Cmnd **) &(hostdata->disconnected_queue),
3194 tmp = (Scsi_Cmnd *) hostdata->disconnected_queue;
3195 tmp; prev = (Scsi_Cmnd **) &(tmp->host_scribble), tmp =
3196 (Scsi_Cmnd *) tmp->host_scribble)
3197 if (cmd == tmp) {
3198 REMOVE(5,*prev,tmp,tmp->host_scribble);
3199 *prev = (Scsi_Cmnd *) tmp->host_scribble;
3200 tmp->host_scribble = NULL((void *) 0);
3201 tmp->result = DID_ABORT0x05 << 16;
3202 sti()__asm__ __volatile__ ("sti": : :"memory");
3203 tmp->done(tmp);
3204 return SCSI_ABORT_SUCCESS1;
3205 }
3206 }
3207
3208/*
3209 * Case 5 : If we reached this point, the command was not found in any of
3210 * the queues.
3211 *
3212 * We probably reached this point because of an unlikely race condition
3213 * between the command completing successfully and the abortion code,
3214 * so we won't panic, but we will notify the user in case something really
3215 * broke.
3216 */
3217
3218 sti()__asm__ __volatile__ ("sti": : :"memory");
3219 printk("scsi%d : warning : SCSI command probably completed successfully\n"
3220 " before abortion\n", instance->host_no);
3221 return SCSI_ABORT_NOT_RUNNING4;
3222}
3223
3224
3225/*
3226 * Function : int NCR5380_reset (Scsi_Cmnd *cmd, unsigned int reset_flags)
3227 *
3228 * Purpose : reset the SCSI bus.
3229 *
3230 * Returns : SCSI_RESET_WAKEUP
3231 *
3232 */
3233
3234#ifndef NCR5380_resetpas16_reset
3235static
3236#endif
3237int NCR5380_resetpas16_reset (Scsi_Cmnd *cmd, unsigned int dummy) {
3238 NCR5380_local_declare()volatile unsigned short io_port;
3239 NCR5380_setup(cmd->host)io_port = (cmd->host)->io_port;
3240
3241 NCR5380_print_status (cmd->host);
3242 do_reset (cmd->host);
3243
3244 return SCSI_RESET_WAKEUP4;
3245}
3246