diff options
| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-02-11 01:54:55 +0100 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-02-11 01:54:55 +0100 |
| commit | c48e6ec36da97d514488f88fa4b9c268fd0d6284 (patch) | |
| tree | 7594f0c0ec4aa44a8655a1eadde7916ac45fc121 | |
| parent | 93932c891eb76fa96f99aea275325c6048b62747 (diff) | |
Fix registers recording in core dump
* exec/elfcore.c (fetch_thread_regset): Fix field shifting order to avoid
losing register content.
| -rw-r--r-- | exec/elfcore.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/exec/elfcore.c b/exec/elfcore.c index f953cc76..1f9238b6 100644 --- a/exec/elfcore.c +++ b/exec/elfcore.c @@ -63,11 +63,11 @@ fetch_thread_regset (thread_t thread, prgregset_t *gregs) (void) thread_get_state (thread, i386_THREAD_STATE, (thread_state_t) &u->state, &count); - u->gregs[REG_EIP] = u->state.eip; - u->gregs[REG_CS] = u->state.cs; - u->gregs[REG_EFL] = u->state.efl; - u->gregs[REG_UESP] = u->state.uesp; u->gregs[REG_SS] = u->state.ss; + u->gregs[REG_UESP] = u->state.uesp; + u->gregs[REG_EFL] = u->state.efl; + u->gregs[REG_CS] = u->state.cs; + u->gregs[REG_EIP] = u->state.eip; /* These are the extra words that don't exist in prgregset_t. */ u->gregs[REG_ERR] = u->gregs[REG_TRAPNO] = 0; |