From 674b3dff6b5498a1542a9c344e7d16effe6f2d11 Mon Sep 17 00:00:00 2001
From: Samuel Thibault <samuel.thibault@ens-lyon.org>
Date: Wed, 20 Dec 2006 21:45:15 +0000
Subject: 2006-12-19 Samuel Thibault <samuel.thibault@ens-lyon.org>
Add support for cr3/cr4 flags.
* i386/i386/proc_reg.h (CR3_PCD, CR3_PWT, CR4_VME, CR4_PVI, CR4_TSD)
(CR4_DE, CR4_PSE, CR4_PAE, CR4_MCE, CR4_PGE, CR4_PCE, CR4_OSFXSR)
(CR4_OSXMMEXCPT, get_cr4, set_cr4): New macros.
* i386/intel/pmap.h (INTEL_PTE_GLOBAL): New macro.
---
i386/i386/proc_reg.h | 38 ++++++++++++++++++++++++++++++++++++++
i386/intel/pmap.h | 1 +
2 files changed, 39 insertions(+)
(limited to 'i386')
diff --git a/i386/i386/proc_reg.h b/i386/i386/proc_reg.h
index 5b9defd..f1b21d4 100644
--- a/i386/i386/proc_reg.h
+++ b/i386/i386/proc_reg.h
@@ -45,6 +45,30 @@
#define CR0_MP 0x00000002 /* monitor coprocessor */
#define CR0_PE 0x00000001 /* enable protected mode */
+/*
+ * CR3
+ */
+#define CR3_PCD 0x0010 /* Page-level Cache Disable */
+#define CR3_PWT 0x0008 /* Page-level Writes Transparent */
+
+/*
+ * CR4
+ */
+#define CR4_VME 0x0001 /* Virtual-8086 Mode Extensions */
+#define CR4_PVI 0x0002 /* Protected-Mode Virtual Interrupts */
+#define CR4_TSD 0x0004 /* Time Stamp Disable */
+#define CR4_DE 0x0008 /* Debugging Extensions */
+#define CR4_PSE 0x0010 /* Page Size Extensions */
+#define CR4_PAE 0x0020 /* Physical Address Extension */
+#define CR4_MCE 0x0040 /* Machine-Check Enable */
+#define CR4_PGE 0x0080 /* Page Global Enable */
+#define CR4_PCE 0x0100 /* Performance-Monitoring Counter
+ * Enable */
+#define CR4_OSFXSR 0x0200 /* Operating System Support for FXSAVE
+ * and FXRSTOR instructions */
+#define CR4_OSXMMEXCPT 0x0400 /* Operating System Support for Unmasked
+ * SIMD Floating-Point Exceptions */
+
#ifndef __ASSEMBLER__
#ifdef __GNUC__
@@ -110,6 +134,20 @@ set_eflags(unsigned eflags)
#define flush_tlb() set_cr3(get_cr3())
+#define get_cr4() \
+ ({ \
+ register unsigned int _temp__; \
+ asm("mov %%cr4, %0" : "=r" (_temp__)); \
+ _temp__; \
+ })
+
+#define set_cr4(value) \
+ ({ \
+ register unsigned int _temp__ = (value); \
+ asm volatile("mov %0, %%cr4" : : "r" (_temp__)); \
+ })
+
+
#define set_ts() \
set_cr0(get_cr0() | CR0_TS)
diff --git a/i386/intel/pmap.h b/i386/intel/pmap.h
index 17dc0ea..a6e4ab9 100644
--- a/i386/intel/pmap.h
+++ b/i386/intel/pmap.h
@@ -105,6 +105,7 @@ typedef unsigned int pt_entry_t;
#define INTEL_PTE_NCACHE 0x00000010
#define INTEL_PTE_REF 0x00000020
#define INTEL_PTE_MOD 0x00000040
+#define INTEL_PTE_GLOBAL 0x00000100
#define INTEL_PTE_WIRED 0x00000200
#define INTEL_PTE_PFN 0xfffff000
--
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