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authorSamuel Thibault <samuel.thibault@ens-lyon.org>2006-12-21 00:12:02 +0000
committerThomas Schwinge <tschwinge@gnu.org>2009-06-18 00:27:00 +0200
commitbc3212cc1f9315c1189b1ffc93b1e0457bc8f11b (patch)
tree1ea88db8851421a4f6262dbb20a65ef7afda15d0 /i386
parent2db1895b9e7aa3c961c6e1f1565459d4547862a7 (diff)
2006-12-19 Samuel Thibault <samuel.thibault@ens-lyon.org>
Add support for global pages. * i386/i386at/model_dep.c: Include <i386/locore.h>. (i386at_init): Set CR4_PGE if available. (c_boot_entry): Call discover_x86_cpu_type() before i386at_init(). * i386/intel/pmap.c: Include <i386/locore.h>. (pmap_map_bd): Use INTEL_PTE_GLOBAL if available. (pmap_bootstrap): Likewise.
Diffstat (limited to 'i386')
-rw-r--r--i386/i386at/model_dep.c8
-rw-r--r--i386/intel/pmap.c10
2 files changed, 14 insertions, 4 deletions
diff --git a/i386/i386at/model_dep.c b/i386/i386at/model_dep.c
index 9f0a1c7..9d6b030 100644
--- a/i386/i386at/model_dep.c
+++ b/i386/i386at/model_dep.c
@@ -50,6 +50,7 @@
#include <i386/machspl.h>
#include <i386/pmap.h>
#include <i386/proc_reg.h>
+#include <i386/locore.h>
/* Location of the kernel's symbol table.
Both of these are 0 if none is available. */
@@ -264,6 +265,8 @@ i386at_init()
kernel_page_dir[lin2pdenum(0)] =
kernel_page_dir[lin2pdenum(LINEAR_MIN_KERNEL_ADDRESS)];
set_cr3((unsigned)kernel_page_dir);
+ if (CPU_HAS_FEATURE(CPU_FEATURE_PGE))
+ set_cr4(get_cr4() | CR4_PGE);
set_cr0(get_cr0() | CR0_PG | CR0_WP);
flush_instr_queue();
@@ -301,6 +304,7 @@ void c_boot_entry(vm_offset_t bi)
{
/* Stash the boot_image_info pointer. */
boot_info = *(struct multiboot_info*)phystokv(bi);
+ int cpu_type;
/* XXX we currently assume phys_mem_va is always 0 here -
if it isn't, we must tweak the pointers in the boot_info. */
@@ -337,6 +341,8 @@ void c_boot_entry(vm_offset_t bi)
}
#endif /* MACH_KDB */
+ cpu_type = discover_x86_cpu_type ();
+
/*
* Do basic VM initialization
*/
@@ -367,7 +373,7 @@ void c_boot_entry(vm_offset_t bi)
machine_slot[0].running = TRUE;
machine_slot[0].cpu_subtype = CPU_SUBTYPE_AT386;
- switch (discover_x86_cpu_type ())
+ switch (cpu_type)
{
case 3:
default:
diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c
index fef0d76..bd19613 100644
--- a/i386/intel/pmap.c
+++ b/i386/intel/pmap.c
@@ -80,6 +80,7 @@
#include <machine/thread.h>
#include <i386/cpu_number.h>
#include <i386/proc_reg.h>
+#include <i386/locore.h>
#ifdef ORC
#define OLIVETTICACHE 1
@@ -547,6 +548,8 @@ vm_offset_t pmap_map_bd(virt, start, end, prot)
register pt_entry_t *pte;
template = pa_to_pte(start) | INTEL_PTE_VALID;
+ if (CPU_HAS_FEATURE(CPU_FEATURE_PGE))
+ template |= INTEL_PTE_GLOBAL;
if (prot & VM_PROT_WRITE)
template |= INTEL_PTE_WRITE;
@@ -627,6 +630,7 @@ void pmap_bootstrap()
*/
{
vm_offset_t va;
+ pt_entry_t global = CPU_HAS_FEATURE(CPU_FEATURE_PGE) ? INTEL_PTE_GLOBAL : 0;
/*
* Map virtual memory for all known physical memory, 1-1,
@@ -647,7 +651,7 @@ void pmap_bootstrap()
/* Initialize the page directory entry. */
*pde = pa_to_pte((vm_offset_t)ptable)
- | INTEL_PTE_VALID | INTEL_PTE_WRITE;
+ | INTEL_PTE_VALID | INTEL_PTE_WRITE | global;
/* Initialize the page table. */
for (pte = ptable; (va < phys_last_addr) && (pte < ptable+NPTES); pte++)
@@ -664,12 +668,12 @@ void pmap_bootstrap()
&& (va + INTEL_PGBYTES <= (vm_offset_t)etext))
{
WRITE_PTE_FAST(pte, pa_to_pte(va)
- | INTEL_PTE_VALID);
+ | INTEL_PTE_VALID | global);
}
else
{
WRITE_PTE_FAST(pte, pa_to_pte(va)
- | INTEL_PTE_VALID | INTEL_PTE_WRITE);
+ | INTEL_PTE_VALID | INTEL_PTE_WRITE | global);
}
va += INTEL_PGBYTES;
}