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authorSamuel Thibault <samuel.thibault@ens-lyon.org>2007-07-06 16:33:48 +0000
committerThomas Schwinge <tschwinge@gnu.org>2009-06-18 00:27:10 +0200
commit5c1f862c2ceccc3326d444879bf85d77b34ee2ea (patch)
treebb9b4f0f3a3a828ece63dde4179db21dd5eee06b /i386
parent352e84795a6ae90930145709e8d539363718cf08 (diff)
2007-07-04 Samuel Thibault <samuel.thibault@ens-lyon.org>
* i386/intel/pmap.c (pmap_enter): Use INTEL_PTE_NCACHE|INTEL_PTE_WTHRU when cpu >= 486 and physical address is after memory end.
Diffstat (limited to 'i386')
-rw-r--r--i386/intel/pmap.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c
index 1043daa..7746c61 100644
--- a/i386/intel/pmap.c
+++ b/i386/intel/pmap.c
@@ -1506,6 +1506,9 @@ Retry:
template |= INTEL_PTE_USER;
if (prot & VM_PROT_WRITE)
template |= INTEL_PTE_WRITE;
+ if (machine_slot[cpu_number()].cpu_type >= CPU_TYPE_I486
+ && pa >= phys_last_addr)
+ template |= INTEL_PTE_NCACHE|INTEL_PTE_WTHRU;
if (wired)
template |= INTEL_PTE_WIRED;
PMAP_UPDATE_TLBS(pmap, v, v + PAGE_SIZE);
@@ -1615,6 +1618,9 @@ Retry:
template |= INTEL_PTE_USER;
if (prot & VM_PROT_WRITE)
template |= INTEL_PTE_WRITE;
+ if (machine_slot[cpu_number()].cpu_type >= CPU_TYPE_I486
+ && pa >= phys_last_addr)
+ template |= INTEL_PTE_NCACHE|INTEL_PTE_WTHRU;
if (wired)
template |= INTEL_PTE_WIRED;
i = ptes_per_vm_page;