diff options
author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-01-28 02:46:18 +0100 |
---|---|---|
committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2013-01-28 02:46:18 +0100 |
commit | e07d6c4995c384be14130bf178989427a4291ded (patch) | |
tree | 76a732a8a2a0f2143ce59d449feabde22fdcda8e | |
parent | 6b010591cb94032a6fef2cb81bed16446f31f8b6 (diff) |
More ifdef fixes for ring1 support and pv descriptors support
* i386/i386/idt_inittab.S: Turn MACH_XEN test into MACH_PV_DESCRIPTORS test.
* i386/i386/fpu.c: Turn appropriate MACH_HYP/XEN tests into MACH_RING1 tests.
* i386/i386/ktss.c: Likewise.
* i386/i386/locore.S: Likewise.
* i386/i386/mp_desc.c: Likewise.
* i386/i386/pcb.c: Likewise.
* i386/i386/proc_reg.h: Likewise.
* i386/i386/trap.c: Likewise.
-rw-r--r-- | i386/i386/fpu.c | 20 | ||||
-rw-r--r-- | i386/i386/idt_inittab.S | 4 | ||||
-rw-r--r-- | i386/i386/ktss.c | 6 | ||||
-rw-r--r-- | i386/i386/locore.S | 42 | ||||
-rw-r--r-- | i386/i386/mp_desc.c | 6 | ||||
-rw-r--r-- | i386/i386/pcb.c | 6 | ||||
-rw-r--r-- | i386/i386/proc_reg.h | 6 | ||||
-rw-r--r-- | i386/i386/trap.c | 4 |
8 files changed, 47 insertions, 47 deletions
diff --git a/i386/i386/fpu.c b/i386/i386/fpu.c index f2c8124..8efe9e8 100644 --- a/i386/i386/fpu.c +++ b/i386/i386/fpu.c @@ -109,9 +109,9 @@ init_fpu() { unsigned short status, control; -#ifdef MACH_HYP +#ifdef MACH_RING1 clear_ts(); -#else /* MACH_HYP */ +#else /* MACH_RING1 */ unsigned int native = 0; if (machine_slot[cpu_number()].cpu_type >= CPU_TYPE_I486) @@ -123,7 +123,7 @@ init_fpu() * the control and status registers. */ set_cr0((get_cr0() & ~(CR0_EM|CR0_TS)) | native); /* allow use of FPU */ -#endif /* MACH_HYP */ +#endif /* MACH_RING1 */ fninit(); status = fnstsw(); @@ -157,10 +157,10 @@ init_fpu() struct i386_xfp_save save; unsigned long mask; fp_kind = FP_387X; -#ifndef MACH_HYP +#ifndef MACH_RING1 printf("Enabling FXSR\n"); set_cr4(get_cr4() | CR4_OSFXSR); -#endif /* MACH_HYP */ +#endif /* MACH_RING1 */ fxsave(&save); mask = save.fp_mxcsr_mask; if (!mask) @@ -169,14 +169,14 @@ init_fpu() } else fp_kind = FP_387; } -#ifdef MACH_HYP +#ifdef MACH_RING1 set_ts(); -#else /* MACH_HYP */ +#else /* MACH_RING1 */ /* * Trap wait instructions. Turn off FPU for now. */ set_cr0(get_cr0() | CR0_TS | CR0_MP); -#endif /* MACH_HYP */ +#endif /* MACH_RING1 */ } else { /* @@ -684,7 +684,7 @@ fpexterrflt() /*NOTREACHED*/ } -#ifndef MACH_XEN +#ifndef MACH_RING1 /* * FPU error. Called by AST. */ @@ -741,7 +741,7 @@ ASSERT_IPL(SPL0); thread->pcb->ims.ifps->fp_save_state.fp_status); /*NOTREACHED*/ } -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ /* * Save FPU state. diff --git a/i386/i386/idt_inittab.S b/i386/i386/idt_inittab.S index 36093b6..8e92d80 100644 --- a/i386/i386/idt_inittab.S +++ b/i386/i386/idt_inittab.S @@ -133,7 +133,7 @@ EXCEPTION(0x1f,t_trap_1f) /* Terminator */ .data 2 .long 0 -#ifdef MACH_XEN +#ifdef MACH_PV_DESCRIPTORS .long 0 -#endif /* MACH_XEN */ +#endif /* MACH_PV_DESCRIPTORS */ diff --git a/i386/i386/ktss.c b/i386/i386/ktss.c index 453aad9..1b2938a 100644 --- a/i386/i386/ktss.c +++ b/i386/i386/ktss.c @@ -45,12 +45,12 @@ ktss_init() /* XXX temporary exception stack */ static int exception_stack[1024]; -#ifdef MACH_XEN +#ifdef MACH_RING1 /* Xen won't allow us to do any I/O by default anyway, just register * exception stack */ if (hyp_stack_switch(KERNEL_DS, (unsigned long)(exception_stack+1024))) panic("couldn't register exception stack\n"); -#else /* MACH_XEN */ +#else /* MACH_RING1 */ /* Initialize the master TSS descriptor. */ fill_gdt_descriptor(KERNEL_TSS, kvtolin(&ktss), sizeof(struct task_tss) - 1, @@ -65,6 +65,6 @@ ktss_init() /* Load the TSS. */ ltr(KERNEL_TSS); -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ } diff --git a/i386/i386/locore.S b/i386/i386/locore.S index d24e172..9aa8485 100644 --- a/i386/i386/locore.S +++ b/i386/i386/locore.S @@ -1412,14 +1412,14 @@ _inst_fetch_fault: ENTRY(dr6) -#ifdef MACH_XEN +#ifdef MACH_RING1 pushl %ebx movl $6, %ebx call __hyp_get_debugreg popl %ebx -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %db6, %eax -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ ret /* dr<i>(address, type, len, persistence) @@ -1427,67 +1427,67 @@ ENTRY(dr6) ENTRY(dr0) movl S_ARG0, %eax movl %eax,EXT(dr_addr) -#ifdef MACH_XEN +#ifdef MACH_RING1 pushl %ebx movl $0,%ebx movl %eax,%ecx call __hyp_set_debugreg -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %eax, %db0 -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ movl $0, %ecx jmp 0f ENTRY(dr1) movl S_ARG0, %eax movl %eax,EXT(dr_addr)+1*4 -#ifdef MACH_XEN +#ifdef MACH_RING1 pushl %ebx movl $1,%ebx movl %eax,%ecx call __hyp_set_debugreg -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %eax, %db1 -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ movl $2, %ecx jmp 0f ENTRY(dr2) movl S_ARG0, %eax movl %eax,EXT(dr_addr)+2*4 -#ifdef MACH_XEN +#ifdef MACH_RING1 pushl %ebx movl $2,%ebx movl %eax,%ecx call __hyp_set_debugreg -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %eax, %db2 -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ movl $4, %ecx jmp 0f ENTRY(dr3) movl S_ARG0, %eax movl %eax,EXT(dr_addr)+3*4 -#ifdef MACH_XEN +#ifdef MACH_RING1 pushl %ebx movl $3,%ebx movl %eax,%ecx call __hyp_set_debugreg -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %eax, %db3 -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ movl $6, %ecx 0: pushl %ebp movl %esp, %ebp -#ifdef MACH_XEN +#ifdef MACH_RING1 movl $7,%ebx call __hyp_get_debugreg movl %eax, %edx -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %db7, %edx -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ movl %edx,EXT(dr_addr)+4*4 andl dr_msk(,%ecx,2),%edx /* clear out new entry */ movl %edx,EXT(dr_addr)+5*4 @@ -1509,14 +1509,14 @@ ENTRY(dr3) shll %cl, %eax orl %eax, %edx -#ifdef MACH_XEN +#ifdef MACH_RING1 movl $7,%ebx movl %edx, %ecx call __hyp_set_debugreg popl %ebx -#else /* MACH_XEN */ +#else /* MACH_RING1 */ movl %edx, %db7 -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ movl %edx,EXT(dr_addr)+7*4 movl %edx, %eax leave diff --git a/i386/i386/mp_desc.c b/i386/i386/mp_desc.c index 2fd5ec2..95f55af 100644 --- a/i386/i386/mp_desc.c +++ b/i386/i386/mp_desc.c @@ -150,9 +150,9 @@ mp_desc_init(mycpu) * Fix up the entries in the GDT to point to * this LDT and this TSS. */ -#ifdef MACH_HYP +#ifdef MACH_RING1 panic("TODO %s:%d\n",__FILE__,__LINE__); -#else /* MACH_HYP */ +#else /* MACH_RING1 */ fill_descriptor(&mpt->gdt[sel_idx(KERNEL_LDT)], (unsigned)&mpt->ldt, LDTSZ * sizeof(struct real_descriptor) - 1, @@ -165,7 +165,7 @@ mp_desc_init(mycpu) mpt->ktss.tss.ss0 = KERNEL_DS; mpt->ktss.tss.io_bit_map_offset = IOPB_INVAL; mpt->ktss.barrier = 0xFF; -#endif /* MACH_HYP */ +#endif /* MACH_RING1 */ return mpt; } diff --git a/i386/i386/pcb.c b/i386/i386/pcb.c index 8d37d69..7d632a6 100644 --- a/i386/i386/pcb.c +++ b/i386/i386/pcb.c @@ -155,13 +155,13 @@ void switch_ktss(pcb) ? (long) (&pcb->iss + 1) : (long) (&pcb->iss.v86_segs); -#ifdef MACH_XEN +#ifdef MACH_RING1 /* No IO mask here */ if (hyp_stack_switch(KERNEL_DS, pcb_stack_top)) panic("stack_switch"); -#else /* MACH_XEN */ +#else /* MACH_RING1 */ curr_ktss(mycpu)->tss.esp0 = pcb_stack_top; -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ } { diff --git a/i386/i386/proc_reg.h b/i386/i386/proc_reg.h index c02b254..f1b2c89 100644 --- a/i386/i386/proc_reg.h +++ b/i386/i386/proc_reg.h @@ -194,18 +194,18 @@ extern unsigned long cr3; }) -#ifdef MACH_HYP +#ifdef MACH_RING1 #define set_ts() \ hyp_fpu_taskswitch(1) #define clear_ts() \ hyp_fpu_taskswitch(0) -#else /* MACH_HYP */ +#else /* MACH_RING1 */ #define set_ts() \ set_cr0(get_cr0() | CR0_TS) #define clear_ts() \ asm volatile("clts") -#endif /* MACH_HYP */ +#endif /* MACH_RING1 */ #define get_tr() \ ({ \ diff --git a/i386/i386/trap.c b/i386/i386/trap.c index 0ca0a3f..74a89f9 100644 --- a/i386/i386/trap.c +++ b/i386/i386/trap.c @@ -585,7 +585,7 @@ i386_astintr() int mycpu = cpu_number(); (void) splsched(); /* block interrupts to check reasons */ -#ifndef MACH_XEN +#ifndef MACH_RING1 if (need_ast[mycpu] & AST_I386_FP) { /* * AST was for delayed floating-point exception - @@ -598,7 +598,7 @@ i386_astintr() fpastintr(); } else -#endif /* MACH_XEN */ +#endif /* MACH_RING1 */ { /* * Not an FPU trap. Handle the AST. |