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[[!meta copyright="Copyright © 2007, 2008 Free Software Foundation, Inc."]]
[[!meta license="""[[!toggle id="license" text="GFDL 1.2+"]][[!toggleable
id="license" text="Permission is granted to copy, distribute and/or modify this
document under the terms of the GNU Free Documentation License, Version 1.2 or
any later version published by the Free Software Foundation; with no Invariant
Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license
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Mach ports are [[capabilities|capability]].
A Mach port is a kernel queue. Each port has associated with
it a receive right and one or more send and send-once rights.
A queue can hold a number of messages. Once the queue is full,
the send blocks until their is space to enqueue the message
(this is interruptible via a timeout mechanism).
A receive right designates a queue and authorizes the holder to
dequeue messages from the queue, and to create send and send-once
rights.
Send and send-once rights designate a queue and authorize the
hold to enqueue messages (in the case of a send-once right,
a single message). Enqueuing a message is equivalent to
[[invoke|invoking]] a capability.
Send and receive rights are named using local names. Each
task has associated with it a port [[address_space]]. A ports
are addressed via this table. Each task thus has its own
private [[naming_context]] for ports.
Ports can be [[delegate]]d in an [[IPC]] message. When the
receiver dequeues the message, the right is made available
to it.
A [[thread]] can only block receiving on a single port. To work
around this, the concept of a port set was introduced. A receive
right can be added to (at most) one port set. When a thread
receives from a port set, it dequeues from any of the ports that
has a message available.
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